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Nowadays, deep neural networks (DNNs) are the core enablers for many emerging edge AI applications. Conventional approaches to training DNNs are generally implemented at central servers or cloud centers for centralized learning, which is…

Networking and Internet Architecture · Computer Science 2020-03-24 Deyin Liu , Xu Chen , Zhi Zhou , Qing Ling

To speedup Deep Neural Networks (DNN) accelerator design and enable effective implementation, we propose HybridDNN, a framework for building high-performance hybrid DNN accelerators and delivering FPGA-based hardware implementations. Novel…

Hardware Architecture · Computer Science 2020-04-09 Hanchen Ye , Xiaofan Zhang , Zhize Huang , Gengsheng Chen , Deming Chen

Deep neural networks (DNN) use a wide range of network topologies to achieve high accuracy within diverse applications. This model diversity makes it impossible to identify a single "dataflow" (execution schedule) to perform optimally…

Hardware Architecture · Computer Science 2024-06-24 Man Shi , Steven Colleman , Charlotte VanDeMieroop , Antony Joseph , Maurice Meijer , Wim Dehaene , Marian Verhelst

The arrival of heterogeneous (or hybrid) multicore architectures has brought new performance trade-offs for applications, and efficiency opportunities to systems. They have also increased the challenges related to thread scheduling, as…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-09-11 Yacine Idouar , Adrien Cassagne , Laércio Lima Pilla , Julien Sopena , Manuel Bouyer , Diane Orhan , Lionel Lacassagne , Dimitri Galayko , Denis Barthou , Christophe Jego

Multi-Head Attention (MHA) is a critical computational kernel in transformer-based AI models. Emerging scalable tile-based accelerator architectures integrate increasing numbers of tightly-packed processing elements (PEs) with tensor units.…

Hardware Architecture · Computer Science 2025-05-27 Chi Zhang , Luca Colagrande , Renzo Andri , Thomas Benz , Gamze Islamoglu , Alessandro Nadalini , Francesco Conti , Yawei Li , Luca Benini

Near-data accelerators (NDAs) that are integrated with main memory have the potential for significant power and performance benefits. Fully realizing these benefits requires the large available memory capacity to be shared between the host…

Hardware Architecture · Computer Science 2020-12-02 Benjamin Y. Cho , Yongkee Kwon , Sangkug Lym , Mattan Erez

Hardware faults on the regular 2-D computing array of a typical deep learning accelerator (DLA) can lead to dramatic prediction accuracy loss. Prior redundancy design approaches typically have each homogeneous redundant processing element…

Hardware Architecture · Computer Science 2021-10-28 Cheng Liu , Cheng Chu , Dawen Xu , Ying Wang , Qianlong Wang , Huawei Li , Xiaowei Li , Kwang-Ting Cheng

The relentless advancement of artificial intelligence (AI) and machine learning (ML) applications necessitates the development of specialized hardware accelerators capable of handling the increasing complexity and computational demands.…

Hardware Architecture · Computer Science 2024-03-20 Hongwu Peng , Caiwen Ding , Tong Geng , Sutanay Choudhury , Kevin Barker , Ang Li

Recently, Deep Neural Networks (DNNs) have recorded great success in handling medical and other complex classification tasks. However, as the sizes of a DNN model and the available dataset increase, the training process becomes more complex…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-02-08 Samson B. Akintoye , Liangxiu Han , Xin Zhang , Haoming Chen , Daoqiang Zhang

Deep neural networks (DNNs) exploit many layers and a large number of parameters to achieve excellent performance. The training process of DNN models generally handles large-scale input data with many sparse features, which incurs high…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-06-08 Ji Liu , Zhihua Wu , Dianhai Yu , Yanjun Ma , Danlei Feng , Minxu Zhang , Xinxuan Wu , Xuefeng Yao , Dejing Dou

Deep neural networks (DNNs) are essential for performing advanced tasks on edge or mobile devices, yet their deployment is often hindered by severe resource constraints, including limited memory, energy, and computational power. While…

Machine Learning · Computer Science 2026-03-04 Qunyou Liu , Pengbo Yu , Marina Zapater , David Atienza

The systolic accelerator is one of the premier architectural choices for DNN acceleration. However, the conventional systolic architecture suffers from low PE utilization due to the mismatch between the fixed array and diverse DNN…

Hardware Architecture · Computer Science 2024-05-16 Meng Han , Liang Wang , Limin Xiao , Tianhao Cai , Zeyu Wang , Xiangrong Xu , Chenhao Zhang

Currently, there is a growing trend of outsourcing the execution of DNNs to cloud services. For service providers, managing multi-tenancy and ensuring high-quality service delivery, particularly in meeting stringent execution time…

Hardware Architecture · Computer Science 2024-04-16 Francesco G. Blanco , Enrico Russo , Maurizio Palesi , Davide Patti , Giuseppe Ascia , Vincenzo Catania

For Human Action Recognition tasks (HAR), 3D Convolutional Neural Networks have proven to be highly effective, achieving state-of-the-art results. This study introduces a novel streaming architecture based toolflow for mapping such models…

Hardware Architecture · Computer Science 2024-03-05 Petros Toupas , Alexander Montgomerie-Corcoran , Christos-Savvas Bouganis , Dimitrios Tzovaras

Mobile and embedded platforms are increasingly required to efficiently execute computationally demanding DNNs across heterogeneous processing elements. At runtime, the available hardware resources to DNNs can vary considerably due to other…

Computer Vision and Pattern Recognition · Computer Science 2021-05-12 Wei Lou , Lei Xun , Amin Sabet , Jia Bi , Jonathon Hare , Geoff V. Merrett

Deep Recommender Models (DLRMs) inference is a fundamental AI workload accounting for more than 79% of the total AI workload in Meta's data centers. DLRMs' performance bottleneck is found in the embedding layers, which perform many random…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-03 Giuseppe Ruggeri , Renzo Andri , Daniele Jahier Pagliari , Lukas Cavigelli

The emergence of heterogeneity and domain-specific architectures targeting deep learning inference show great potential for enabling the deployment of modern CNNs on resource-constrained embedded platforms. A significant development is the…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-25 Dmitri Lyalikov

In Federated Learning (FL), devices that participate in the training usually have heterogeneous resources, i.e., energy availability. In current deployments of FL, devices that do not fulfill certain hardware requirements are often dropped…

Hardware Architecture · Computer Science 2024-12-03 Kilian Pfeiffer , Konstantinos Balaskas , Kostas Siozios , Jörg Henkel

Artificial intelligence (AI) application domains consist of a mix of tensor operations with high and low arithmetic intensities (aka reuse). Hierarchical (i.e. compute along multiple levels of memory hierarchy) and heterogeneous (multiple…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-02-19 Raveesh Garg , Michael Pellauer , Tushar Krishna

Designing hardware accelerators for deep neural networks (DNNs) has been much desired. Nonetheless, most of these existing accelerators are built for either convolutional neural networks (CNNs) or recurrent neural networks (RNNs). Recently,…

Signal Processing · Electrical Eng. & Systems 2020-09-21 Siyuan Lu , Meiqi Wang , Shuang Liang , Jun Lin , Zhongfeng Wang