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Related papers: Cache Persistence Analysis: Finally Exact

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For applications in worst-case execution time analysis and in security, it is desirable to statically classify memory accesses into those that result in cache hits, and those that result in cache misses. Among cache replacement policies,…

Programming Languages · Computer Science 2018-12-21 Claire Maïza , Valentin Touzeau , David Monniaux , Jan Reineke

Modern processors use cache memory: a memory access that "hits" the cache returns early, while a "miss" takes more time. Given a memory access in a program, cache analysis consists in deciding whether this access is always a hit, always a…

Programming Languages · Computer Science 2019-09-24 David Monniaux , Valentin Touzeau

On real-time systems running under timing constraints, scheduling can be performed when one is aware of the worst case execution time (WCET) of tasks. Usually, the WCET of a task is unknown and schedulers make use of safe…

Programming Languages · Computer Science 2017-07-07 Valentin Touzeau , Claire Maïza , David Monniaux

In modern GPU inference, cache efficiency remains a major bottleneck, and heuristic policies such as \textsc{LRU} can perform far worse than the offline optimum. Existing learning-based caching systems improve hit rates mainly through…

Static cache analysis characterizes a program's cache behavior by determining in a sound but approximate manner which memory accesses result in cache hits and which result in cache misses. Such information is valuable in optimizing…

Programming Languages · Computer Science 2021-08-23 Valentin Touzeau , Claire Maïza , David Monniaux , Jan Reineke

In this work we unify two existing lines of work towards cache analysis for non-LRU policies. To this end, we extend the notion of competitiveness to block competitiveness and systematically analyze the competitiveness and block…

Programming Languages · Computer Science 2025-04-22 Sophie Kahlen , Jan Reineke

Memory caches are being aggressively used in today's data-parallel systems such as Spark, Tez, and Piccolo. However, prevalent systems employ rather simple cache management policies--notably the Least Recently Used (LRU) policy--that are…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-03-27 Yinghao Yu , Wei Wang , Jun Zhang , Khaled Ben Letaief

In a 2002 paper, Che and co-authors proposed a simple approach for estimating the hit rates of a cache operating the least recently used (LRU) replacement policy. The approximation proves remarkably accurate and is applicable to quite…

Networking and Internet Architecture · Computer Science 2012-02-20 Christine Fricker , Philippe Robert , James Roberts

The static analysis of cache accesses consists in correctly predicting which accesses are hits or misses. While there exist good exact and approximate analyses for caches implementing the least recently used (LRU) replacement policy, such…

Hardware Architecture · Computer Science 2022-02-01 David Monniaux

While the cost of computation is an easy to understand local property, the cost of data movement on cached architectures depends on global state, does not compose, and is hard to predict. As a result, programmers often fail to consider the…

Performance · Computer Science 2020-01-07 Tobias Gysi , Tobias Grosser , Laurin Brandner , Torsten Hoefler

This paper presents a comprehensive comparison of distributed caching algorithms employed in modern distributed systems. We evaluate various caching strategies including Least Recently Used (LRU), Least Frequently Used (LFU), Adaptive…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-04-04 Helen Mayer , James Richards

While Deep Learning (DL) technologies are a promising tool to solve networking problems that map to classification tasks, their computational complexity is still too high with respect to real-time traffic measurements requirements. To…

Networking and Internet Architecture · Computer Science 2022-10-04 Alessandro Finamore , James Roberts , Massimo Gallo , Dario Rossi

Several real-time delay-sensitive applications pose varying degrees of freshness demands on the requested content. The performance of cache replacement policies that are agnostic to these demands is likely to be sub-optimal. Motivated by…

Networking and Internet Architecture · Computer Science 2018-01-01 Pawan Poojary , Sharayu Moharir , Krishna Jagannathan

The modeling and analysis of an LRU cache is extremely challenging as exact results for the main performance metrics (e.g. hit rate) are either lacking or cannot be used because of their high computational complexity for large caches. As a…

Performance · Computer Science 2018-07-11 Bo Jiang , Philippe Nain , Don Towsley

Cause-effect chains, as a widely used modeling method in real-time embedded systems, are extensively applied in various safety-critical domains. End-to-end latency, as a key real-time attribute of cause-effect chains, is crucial in many…

Systems and Control · Electrical Eng. & Systems 2026-01-29 Yixuan Zhu , Yinkang Gao , Bo Zhang , Xiaohang Gong , Binze Jiang , Lei Gong , Wenqi Lou , Teng Wang , Chao Wang , Xi Li , Xuehai Zhou

Memory caches are being aggressively used in today's data-parallel frameworks such as Spark, Tez and Storm. By caching input and intermediate data in memory, compute tasks can witness speedup by orders of magnitude. To maximize the chance…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-08-29 Yinghao Yu , Wei Wang , Jun Zhang , Khaled B. Letaief

WCET (Worst-Case Execution Time) estimation on multicore architecture is particularly challenging mainly due to the complex accesses over cache shared by multiple cores. Existing analysis identifies possible contentions between parallel…

Crucial performance metrics of a caching algorithm include its ability to quickly and accurately learn a popularity distribution of requests. However, a majority of work on analytical performance analysis focuses on hit probability after an…

Networking and Internet Architecture · Computer Science 2020-04-02 Archana Bura , Desik Rengarajan , Dileep Kalathil , Srinivas Shakkottai , Jean-Francois Chamberland-Tremblay

TTL caching models have recently regained significant research interest, largely due to their ability to fit popular caching policies such as LRU. This paper advances the state-of-the-art analysis of TTL-based cache networks by developing…

Performance · Computer Science 2014-02-26 Daniel S. Berger , Philipp Gland , Sahil Singla , Florin Ciucu

Last-Level Cache (LLC) represents the bulk of a modern CPU processor's transistor budget and is essential for application performance as LLC enables fast access to data in contrast to much slower main memory. However, applications with…

Hardware Architecture · Computer Science 2020-06-16 Priyank Faldu
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