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Spin-Transfer Torque RAM (STTRAM) is a promising alternative to SRAM in on-chip caches due to several advantages. These advantages include non-volatility, low leakage, high integration density, and CMOS compatibility. Prior studies have…

Hardware Architecture · Computer Science 2020-09-25 Kyle Kuan , Tosiron Adegbija

Prior studies have shown that the retention time of the non-volatile spin-transfer torque RAM (STT-RAM) can be relaxed in order to reduce STT-RAM's write energy and latency. However, since different applications may require different…

Computers and Society · Computer Science 2024-07-30 Dhruv Gajaria , Kyle Kuan , Tosiron Adegbija

Much research has shown that applications have variable runtime cache requirements. In the context of the increasingly popular Spin-Transfer Torque RAM (STT-RAM) cache, the retention time, which defines how long the cache can retain a cache…

Hardware Architecture · Computer Science 2019-05-20 Kyle Kuan , Tosiron Adegbija

In this paper, we present a novel cache design based on Multi-Level Cell Spin-Transfer Torque RAM (MLC STTRAM) that can dynamically adapt the set capacity and associativity to use efficiently the full potential of MLC STTRAM. We exploit the…

Hardware Architecture · Computer Science 2017-06-13 Amin Jadidi , Mohammad Arjomand , Mahmut T. Kandemir , Chita R. Das

Spin-Transfer Torque RAM (STT-RAM) is widely considered a promising alternative to SRAM in the memory hierarchy due to STT-RAM's non-volatility, low leakage power, high density, and fast read speed. The STT-RAM's small feature size is…

Hardware Architecture · Computer Science 2019-08-12 Kyle Kuan , Tosiron Adegbija

Relaxed retention (or volatile) spin-transfer torque RAM (STT-RAM) has been widely studied as a way to reduce STT-RAM's write energy and latency overheads. Given a relaxed retention time STT-RAM level one (L1) cache, we analyze the impacts…

Computers and Society · Computer Science 2024-07-30 Dhruv Gajaria , Tosiron Adegbija

Spin-Transfer Torque RAM (STTRAM) is promising for cache applications. However, it brings new data security issues that were absent in volatile memory counterparts such as Static RAM (SRAM) and embedded Dynamic RAM (eDRAM). This is…

Cryptography and Security · Computer Science 2016-03-22 Nitin Rathi , Asmit De , Helia Naeimi , Swaroop Ghosh

Various constraints of Static Random Access Memory (SRAM) are leading to consider new memory technologies as candidates for building on-chip shared last-level caches (SLLCs). Spin-Transfer Torque RAM (STT-RAM) is currently postulated as the…

In-memory computing is a promising approach to addressing the processor-memory data transfer bottleneck in computing systems. We propose Spin-Transfer Torque Compute-in-Memory (STT-CiM), a design for in-memory computing with Spin-Transfer…

Emerging Technologies · Computer Science 2017-11-22 Shubham Jain , Ashish Ranjan , Kaushik Roy , Anand Raghunathan

Last level caches (LLCs) occupy a large chip-area and there size is expected to grow further to offset the limitations of memory bandwidth and speed. Due to high leakage consumption of SRAM device, caches designed with SRAM consume large…

Hardware Architecture · Computer Science 2014-08-12 Sparsh Mittal

Network latency in mobile software has a large impact on user experience, with potentially severe economic consequences. Prefetching and caching have been shown effective in reducing the latencies in browser-based systems. However, those…

Software Engineering · Computer Science 2018-10-23 Yixue Zhao , Paul Wat , Marcelo Schmitt Laser , Nenad Medvidovic

With emerging storage-class memory (SCM) nearing commercialization, there is evidence that it will deliver the much-anticipated high density and access latencies within only a few factors of DRAM. Nevertheless, the latency-sensitive nature…

Storage Class Memory (SCM) is a class of memory technology which has recently become viable for use. Their namearises from the fact that they exhibit non-volatility of data, similar to secondary storage while also having latencies…

Hardware Architecture · Computer Science 2019-09-27 Aditya K Kamath , Leslie Monis , A Tarun Karthik , Basavaraj Talawar

As capacity and complexity of on-chip cache memory hierarchy increases, the service cost to the critical loads from Last Level Cache (LLC), which are frequently repeated, has become a major concern. The processor may stall for a…

Hardware Architecture · Computer Science 2016-08-09 Navid Khoshavi , Xunchao Chen , Jun Wang , Ronald F. DeMara

Spin-Transfer Torque Magnetic RAM (STT-MRAM) is known as the most promising replacement for SRAM technology in large Last-Level Caches (LLCs). Despite its high-density, non-volatility, near-zero leakage power, and immunity to radiation as…

Hardware Architecture · Computer Science 2022-01-11 Elham Cheshmikhani , Hamed Farbeh , Hossein Asadi

In recent years, we have observed a clear trend in the rapid rise of autonomous vehicles, robotics, virtual reality, and augmented reality. The core technology enabling these applications, Simultaneous Localization And Mapping (SLAM),…

Hardware Architecture · Computer Science 2017-02-07 Jie Tang , Shaoshan Liu , Jean-Luc Gaudiot

Spin Transfer Torque Random Access Memory (STT-RAM) has garnered interest due to its various characteristics such as non-volatility, low leakage power, high density. Its magnetic properties have a vital role in STT switching operations…

Hardware Architecture · Computer Science 2022-08-17 Saeed Seyedfaraji , Javad Talafy Daryani , Mohamed M. Sabry Aly , Semeen Rehman

In-memory computing promises to overcome the von Neumann bottleneck in computer systems by performing computations directly within the memory. Previous research has suggested using Spin-Transfer Torque RAM (STT-RAM) for in-memory computing…

Computers and Society · Computer Science 2024-07-30 Dhruv Gajaria , Kevin Antony Gomez , Tosiron Adegbija

Caching is widely used in industry to improve application performance by reducing data-access latency and taking the load off the backend infrastructure. TTLs have become the de-facto mechanism used to keep cached data reasonably fresh…

Operating Systems · Computer Science 2024-12-31 Ziming Mao , Rishabh Iyer , Scott Shenker , Ion Stoica

The number of battery-powered devices is rapidly increasing due to the widespread use of IoT-enabled nodes in various fields. Energy harvesters, which help to power embedded devices, are a feasible alternative to replacing battery-powered…

Hardware Architecture · Computer Science 2023-05-18 SatyaJaswanth Badri , Mukesh Saini , Neeraj Goel
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