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Approximate computing is emerging as an alternative to accurate computing due to its potential for realizing digital circuits and systems with low power dissipation, less critical path delay, and less area occupancy for an acceptable…

Hardware Architecture · Computer Science 2018-01-19 P Balasubramanian

We present a new asynchronous quasi-delay-insensitive (QDI) block carry lookahead adder with redundancy carry (BCLARC) realized using delay-insensitive dual-rail data encoding and 4-phase return-to-zero (RTZ) and 4-phase return-to-one (RTO)…

Hardware Architecture · Computer Science 2019-03-25 P. Balasubramanian , D. L. Maskell , N. E. Mastorakis

This technical note compares the performance of some synchronous adders which correspond to the following architectures: i) ripple carry adder (RCA), ii) recursive carry lookahead adder (RCLA), iii) hybrid RCLA-RCA with the RCA used in the…

Hardware Architecture · Computer Science 2018-10-03 P Balasubramanian

Mission-critical and safety-critical applications generally tend to incorporate triple modular redundancy (TMR) to embed fault tolerance in their physical implementations. In a TMR realization, an original function block, which may be a…

Hardware Architecture · Computer Science 2020-08-14 P Balasubramanian , D L Maskell , N E Mastorakis

The purpose of this paper is to formally specify a flow devoted to the design of Differential Power Analysis (DPA) resistant QDI asynchronous circuits. The paper first proposes a formal modeling of the electrical signature of QDI…

Hardware Architecture · Computer Science 2007-10-19 G. F. Bouesse , M. Renaudin , S. Dumont , F. Germain

By design, quasi delay-insensitive (QDI) circuits exhibit higher resilience against timing variations as compared to their synchronous counterparts. Since computation in QDI circuits is event-based rather than clock-triggered, spurious…

Hardware Architecture · Computer Science 2023-07-07 Raghda El Shehaby , Matthias Függer , Andreas Steininger

The Dadda algorithm is a parallel structured multiplier, which is quite faster as compared to array multipliers, i.e., Booth, Braun, Baugh-Wooley, etc. However, it consumes more power and needs a larger number of gates for hardware…

Systems and Control · Electrical Eng. & Systems 2023-07-13 Muteen Munawar , Zain Shabbir , Muhammad Akram

The quantum cryptographic conferencing (QCC) protocol, which distributes identical secure keys to user groups, is a crucial component of the quantum network. Previous experimental works have implemented the measurement-device-independent…

Quantum Physics · Physics 2026-02-25 Yifeng Du , Yang Hu , Yufeng Liu , Wenhan Yan , Jinghao Zhang , Shining Zhu , Xiao-Song Ma

The new variant of measurement-device-independent quantum key distribution (MDI-QKD), called asynchronous MDI-QKD or mode-pairing MDI-QKD, offers similar repeater-like rate-loss scaling but has the advantage of simple technology…

Quantum Physics · Physics 2023-07-25 Yuan-Mei Xie , Jun-Lin Bai , Yu-Shuo Lu , Chen-Xun Weng , Hua-Lei Yin , Zeng-Bing Chen

Optimization techniques for decreasing the time and area of adder circuits have been extensively studied for years mostly in binary logic system. In this paper, we provide the necessary equations required to design a full adder in…

Hardware Architecture · Computer Science 2010-09-15 Anindya Das , Ifat Jahangir , Masud Hasan

This paper presents the designs of asynchronous early output dual-bit full adders without and with redundant logic (implicit) corresponding to homogeneous and heterogeneous delay-insensitive data encoding. For homogeneous delay-insensitive…

Hardware Architecture · Computer Science 2017-04-26 P Balasubramanian , K Prasad

This article presents two area/latency optimized gate level asynchronous full adder designs which correspond to early output logic. The proposed full adders are constructed using the delay-insensitive dual-rail code and adhere to the…

Hardware Architecture · Computer Science 2016-04-15 P Balasubramanian , S Yamashita

The main areas of research in VLSI system design include area, high speed, and power-efficient data route logic systems. The amount of time needed to send a carry through the adder limits the pace at which addition can occur in digital…

Hardware Architecture · Computer Science 2024-10-22 CH. Pallavi , C. Padma , R. Kiran Kumar , T. Suguna , C. Nalini

This paper proposes a "quasi-synchronous" design approach for signal processing circuits, in which timing violations are permitted, but without the need for a hardware compensation mechanism. The case of a low-density parity-check (LDPC)…

Information Theory · Computer Science 2017-11-21 François Leduc-Primeau , Frank R. Kschischang , Warren J. Gross

In this paper, the quasi-constant modulus (QCM) property is analyzed and leveraged in the design of nonlinearity-tolerant four-dimensional (4D) modulation formats. Accordingly, we propose a family of QCM-based quadrature amplitude…

Signal Processing · Electrical Eng. & Systems 2026-04-21 Junzhe Xiao , Zekun Niu , Lyu Li , Minghui Shi , Weisheng Hu , Lilin Yi

We have developed a quantum annealing processor, based on an array of tunably coupled rf-SQUID flux qubits, fabricated in a superconducting integrated circuit process [1]. Implementing this type of processor at a scale of 512 qubits and…

We consider the problem of constructing fast and small parallel prefix adders for non-uniform input arrival times. This problem arises whenever the adder is embedded into a more complex circuit, e. g. a multiplier. Most previous results are…

Hardware Architecture · Computer Science 2014-11-12 Stephan Held , Sophie Spirkl

Electronic devices primarily aim to offer low power consumption, high speed, and a compact area. The performance of very large-scale integration (VLSI) devices is influenced by arithmetic operations, where multiplication is a crucial…

Hardware Architecture · Computer Science 2025-06-16 Ali Ranjbar , Elham Esmaeili , Roghayeh Rafieisangari , Nabiollah Shiri

Quasi-parametric amplification (QPA) is a nonlinear interaction in which the idler wave is depleted through some loss mechanism. QPA plays an important role in signal amplification in ultrafast photonics and quantum light generation. The…

The linear constraint of secret key rate capacity is overcome by the tiwn-field quantum key distribution (QKD). However, the complex phase-locking and phase-tracking technique requirements throttle the real-life applications of twin-field…

Quantum Physics · Physics 2023-08-09 Jun-Lin Bai , Yuan-Mei Xie , Yao Fu , Hua-Lei Yin , Zeng-Bing Chen
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