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We study matrix-matrix multiplication of two matrices, $A$ and $B$, each of size $n \times n$. This operation results in a matrix $C$ of size $n\times n$. Our goal is to produce $C$ as efficiently as possible given a cache: a 1-D limited…

Data Structures and Algorithms · Computer Science 2023-11-15 Neil Bhavikatti

The current workloads and applications are highly diversified, facing critical challenges such as the Power Wall and the Memory Wall Problem. Different strategies over the multiple levels of Caches have evolved to mitigate these problems.…

Hardware Architecture · Computer Science 2023-04-13 Murali Dadi , Shubhang Pandey , Aparna Behera , T G Venkatesh

This paper presents the Neural Cache architecture, which re-purposes cache structures to transform them into massively parallel compute units capable of running inferences for Deep Neural Networks. Techniques to do in-situ arithmetic in…

Hardware Architecture · Computer Science 2018-05-11 Charles Eckert , Xiaowei Wang , Jingcheng Wang , Arun Subramaniyan , Ravi Iyer , Dennis Sylvester , David Blaauw , Reetuparna Das

Fault tolerance overhead of high performance computing (HPC) applications is becoming critical to the efficient utilization of HPC systems at large scale. HPC applications typically tolerate fail-stop failures by checkpointing. Another…

Distributed, Parallel, and Cluster Computing · Computer Science 2011-06-22 Erlin Yao , Mingyu Chen , Rui Wang , Wenli Zhang , Guangming Tan

The Least-Recently Used cache replacement policy and its variants are widely deployed in modern processors. This paper shows for the first time in detail that the LRU states of caches can be used to leak information: any access to a cache…

Cryptography and Security · Computer Science 2020-01-06 Wenjie Xiong , Jakub Szefer

The increasing number of threads inside the cores of a multicore processor, and competitive access to the shared cache memory, become the main reasons for an increased number of competitive cache misses and performance decline. Inevitably,…

Hardware Architecture · Computer Science 2017-01-09 Milcho Prisagjanec , Pece Mitrevski

We present Prompt Cache, an approach for accelerating inference for large language models (LLM) by reusing attention states across different LLM prompts. Many input prompts have overlapping text segments, such as system messages, prompt…

Computation and Language · Computer Science 2024-04-26 In Gim , Guojun Chen , Seung-seob Lee , Nikhil Sarda , Anurag Khandelwal , Lin Zhong

Diffusion Transformers have recently demonstrated unprecedented generative capabilities for various tasks. The encouraging results, however, come with the cost of slow inference, since each denoising step requires inference on a transformer…

Machine Learning · Computer Science 2024-11-19 Xinyin Ma , Gongfan Fang , Michael Bi Mi , Xinchao Wang

The near-field (P2P) operator in the Multilevel Fast Multipole Algorithm (MLFMA) is a performance bottleneck on GPUs due to poor memory locality. This work introduces data redundancy to improve spatial locality by reducing memory access…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-11-27 Morteza Sadeghi

In recommendation systems, practitioners observed that increase in the number of embedding tables and their sizes often leads to significant improvement in model performances. Given this and the business importance of these models to major…

Machine Learning · Computer Science 2020-10-26 Jie Amy Yang , Jianyu Huang , Jongsoo Park , Ping Tak Peter Tang , Andrew Tulloch

A large language model (LLM) is one of the most important emerging machine learning applications nowadays. However, due to its huge model size and runtime increase of the memory footprint, LLM inferences suffer from the lack of memory…

Hardware Architecture · Computer Science 2025-04-22 Soojin Hwang , Jungwoo Kim , Sanghyeon Lee , Hongbeen Kim , Jaehyuk Huh

Modern large language model workloads put increasing demands on parallel compute capability and on-chip memory capacity, while also stressing fine-grained data movement and synchronization. These trends motivate exploring and designing…

Hardware Architecture · Computer Science 2026-05-11 Yinrong Li , Zexin Fu , Yichao Zhang , Germain Haugou , Chi Zhang , Marco Bertuletti , Bowen Wang , Luca Benini

The increasing demand of dedicated accelerators to improve energy efficiency and performance has highlighted FPGAs as a promising option to deliver both. However, programming FPGAs in hardware description languages requires long time and…

Hardware Architecture · Computer Science 2020-03-31 Maria A. Dávila-Guzmán , Rubén Gran Tejero , María Villarroya-Gaudó , Darío Suárez Gracia

Modern hardware systems are heavily underutilized when running large-scale graph applications. While many in-memory graph frameworks have made substantial progress in optimizing these applications, we show that it is still possible to…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-01-15 Yunming Zhang , Vladimir Kiriansky , Charith Mendis , Matei Zaharia , Saman Amarasinghe

The growing need for continuous processing capabilities has led to the development of multicore systems with a complex cache hierarchy. Such multicore systems are generally designed for improving the performance in average case, while hard…

Operating Systems · Computer Science 2013-12-17 Lilia Zaourar , Mathieu Jan , Maurice Pitel

The size of computer networks, along with their bandwidths, is growing exponentially. To support these large, high-speed networks, it is neccessary to be able to forward packets in a few microseconds. One part of the forwarding operation…

Networking and Internet Architecture · Computer Science 2007-05-23 R. Jain

Recently, businesses have started using MapReduce as a popular computation framework for processing large amount of data, such as spam detection, and different data mining tasks, in both public and private clouds. Two of the challenging…

Distributed, Parallel, and Cluster Computing · Computer Science 2013-03-18 Nikzad Babaii Rizvandi , Javid Taheri , Reza Moraveji , Albert Y. Zomaya

Parallel programming is emerging fast and intensive applications need more resources, so there is a huge demand for on-chip multiprocessors. Accessing L1 caches beside the cores are the fastest after registers but the size of private caches…

Performance · Computer Science 2016-09-27 Diman Zad Tootaghaj , Farshid Farhat

A key-value cache is a key component of many services to provide low-latency and high-throughput data accesses to a huge amount of data. To improve the end-to-end performance of such services, a key-value cache must achieve a high cache hit…

Networking and Internet Architecture · Computer Science 2021-12-21 Hiroshi Inoue

Most real-world datasets, and particularly those collected from physical systems, are full of noise, packet loss, and other imperfections. However, most specification mining, anomaly detection and other such algorithms assume, or even…

Machine Learning · Computer Science 2019-04-12 Ilia Sucholutsky , Apurva Narayan , Matthias Schonlau , Sebastian Fischmeister