Related papers: Prototype of a transient waveform recording ASIC

We present our latest ASIC, which is used for the readout of Cadmium Telluride double-sided strip detectors (CdTe DSDs) and high spectroscopic imaging. It is implemented in a 0.35 um CMOS technology (X-Fab XH035), consists of 64 readout…

This manuscript describes a radiation-hardened current-mode delta-sigma ADC fabricated in a standard 130 nm CMOS technology and qualified for total ionizing doses up to 100 Mrad. The operational signal range achieved with a 100 s…

Compared with silicon (Si) power devices, Silicon carbide (SiC) devices have the advantages of fast switching speed and low on-resistance. However, the effects of non-ideal characteristics of SiC MOSFETs and stray parameters (especially…

We consider compressive sensing as a source coding method for signal transmission. We concatenate a convolutional coding system with 1-bit compressive sensing to obtain a serial concatenated system model for sparse signal transmission over…

We develop a high speed on-chip flux measurement using a capacitively shunted SQUID as an embedded cryogenic transducer and apply this technique to the qualification of a near-term scalable printed circuit board (PCB) package for frequency…

PARISROC is a complete read out chip, in AMS SiGe 0.35 !m technology, for photomultipliers array. It allows triggerless acquisition for next generation neutrino experiments and it belongs to an R&D program funded by the French national…

The ATLAS Semiconductor Tracker (SCT) together with the pixel and the transition radiation detectors will form the tracking system of the ATLAS experiment at LHC. It will consist of 20000 single-sided silicon microstrip sensors assembled…

Multiple application-specific integrated circuits (ASIC) are required for the detectors if their readout channels are larger than that of ASIC channels. For a system with such a readout scheme, there is a need to configure channels among…

This paper present high precision halfwave rectifier circuit in dual phase output mode by 0.5 micrometer CMOS technology, plus or minus 1.5 V low voltage, it has received input signal and sent output current signal, respond in high…

We propose a feature-extraction procedure based on the statistical characterization of waveforms, applied as a fast pre-processing stage in a pattern recognition task using simple artificial neural network models. This procedure involves…

Implantable Brain-Computer Interfaces (iBCIs) are increasingly pivotal in clinical and daily applications. However, wireless iBCIs face severe constraints in power consumption and data throughput. To mitigate these bottlenecks, we propose a…

A new application-specific integrated circuit (ASIC), the high-speed charge-to-time converter (QTC) IWATSU CLC101, provides three channels, each consisting of preamplifier, discriminator, low-pass filter, and charge integration circuitry,…

We have developed a digital fast Fourier transform (FFT) spectrometer made of an analog-to-digital converter (ADC) and a field-programmable gate array (FPGA). The base instrument has independent ADC and FPGA modules, which allow us to…

To fully unlock the benefits of multiple-input multiple-output (MIMO) networks, downlink channel state information (CSI) is required at the base station (BS). In frequency division duplex (FDD) systems, the CSI is acquired through a…

We report a new technique of scanning capacitance microscopy at microwave frequencies. A near field scanning microwave microscope probe is kept at a constant height of about 1nm above the samplewith the help of Scanning Tunneling Microscope…

We propose a novel framework for integrated communication and computing (ICC) transceiver design in time-varying millimeter-wave (mmWave) channels. In particular, in order to cope with the dynamics of time-varying mmWave channels, the…

Modern communication receiver architectures center around digital signal processing (DSP), with the bulk of the receiver processing being performed on digital signals obtained after analog-to-digital conversion (ADC). In this paper, we…

We develop sparse array receive beamformer design methods achieving maximum signal-to-interference plus noise ratio (MaxSINR) for wideband sources and jammers. Both tapped delay line (TDL) filtering and the DFT realizations to wideband…

We present a proof-of-principle study of variational quantum sensing for estimating a structured linear function of local phase parameters, in which each qubit in a spin-1/2 array accumulates a phase phi_i = alpha_i theta with known weights…

In this paper, we propose a novel symbiotic sensing and communication (SSAC) framework, comprising a base station (BS) and a passive sensing node. In particular, the BS transmits communication waveform to serve vehicle users (VUEs), while…