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Deep neural networks (DNN) have become significant applications in both cloud-server and edge devices. Meanwhile, the growing number of DNNs on those platforms raises the need to execute multiple DNNs on the same device. This paper proposes…

Hardware Architecture · Computer Science 2023-02-22 Midia Reshadi , David Gregg

Semiconductor NAND Flash based memory technology dominates the electronic Non-Volatile storage media market. Though NAND Flash offers superior performance and reliability over conventional magnetic HDDs, yet it suffers from certain…

Cryptography and Security · Computer Science 2020-01-22 Abhilash Garg , Supriya Chakraborty , Manoj Malik , Devesh Kumar , Satyajeet Singh , Manan Suri

Disaggregation is an ongoing trend to increase flexibility in datacenters. With interconnect technologies like CXL, pools of CPUs, accelerators, and memory can be connected via a datacenter fabric. Applications can then pick from those…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-06-17 Nils Asmussen , Michael Roitzsch

In recent years, data-intensive applications have been increasingly deployed on cloud systems. Such applications utilize significant compute, memory, and I/O resources to process large volumes of data. Optimizing the performance and…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-11-15 Qing Wang , Snigdhaswin Kar , Prabodh Mishra , Caleb Linduff , Ryan Izard , Khayam Anjam , Geddings Barrineau , Junaid Zulfiqar , Kuang-Ching Wang

Existing distributed machine learning (DML) systems focus on improving the computational efficiency of distributed learning, whereas communication aspects have received less attention. Many DML systems treat the network as a blackbox. Thus,…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-07-02 Raajay Viswanathan , Aditya Akella

Deep neural networks (DNN) use a wide range of network topologies to achieve high accuracy within diverse applications. This model diversity makes it impossible to identify a single "dataflow" (execution schedule) to perform optimally…

Hardware Architecture · Computer Science 2024-06-24 Man Shi , Steven Colleman , Charlotte VanDeMieroop , Antony Joseph , Maurice Meijer , Wim Dehaene , Marian Verhelst

Due to amount of data involved in emerging deep learning and big data applications, operations related to data movement have quickly become the bottleneck. Data-centric computing (DCC), as enabled by processing-in-memory (PIM) and…

Hardware Architecture · Computer Science 2020-09-22 Kamil Khan , Sudeep Pasricha , Ryan Gary Kim

Commodity memory interfaces have difficulty in scaling memory capacity to meet the needs of modern multicore and big data systems. DRAM device density and maximum device count are constrained by technology, package, and signal in- tegrity…

Hardware Architecture · Computer Science 2015-05-14 Zehan Cui , Tianyue Lu , Haiyang Pan , Sally A. Mckee , Mingyu Chen

Raw bit errors are common in NAND flash memory and will increase in the future. These errors reduce flash reliability and limit the lifetime of a flash memory device. We aim to improve flash reliability with a multitude of low-cost…

Hardware Architecture · Computer Science 2018-08-16 Yixin Luo

Businesses have made increasing adoption and incorporation of cloud technology into internal processes in the last decade. The cloud-based deployment provides on-demand availability without active management. More recently, the concept of…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-10-01 Ying Mao , Yuqi Fu , Suwen Gu , Wenrui Mu , Long Cheng , Qingzhi Liu

Emerging interconnects, such as CXL and NVLink, have been integrated into the intra-host topology to scale more accelerators and facilitate efficient communication between them, such as GPUs. To keep pace with the accelerator's growing…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-01-19 Xu Zhang , Ke Liu , Yisong Chang , Ke Zhang , Mingyu Chen

As artificial intelligence (AI) and machine learning (ML) technologies disrupt a wide range of industries, cloud datacenters face ever-increasing demand in inference workloads. However, conventional CPU-based servers cannot handle excessive…

Hardware Architecture · Computer Science 2022-06-08 Jung-Hoon Kim , Sungyeob Yoo , Seungjae Moon , Joo-Young Kim

Transformer-based models dominate modern AI workloads but exacerbate memory bottlenecks due to their quadratic attention complexity and ever-growing model sizes. Existing accelerators, such as Groq and Cerebras, mitigate off-chip traffic…

Hardware Architecture · Computer Science 2026-02-12 Jinxin Yu , Yudong Pan , Mengdi Wang , Huawei Li , Yinhe Han , Xiaowei Li , Ying Wang

Computing-in-memory with emerging non-volatile memory (nvCiM) is shown to be a promising candidate for accelerating deep neural networks (DNNs) with high energy efficiency. However, most non-volatile memory (NVM) devices suffer from…

Hardware Architecture · Computer Science 2022-05-27 Zheyu Yan , Xiaobo Sharon Hu , Yiyu Shi

Diffusion-based motion planners have achieved state-of-the-art results on benchmarks such as nuPlan, yet their evaluation within closed-loop production autonomous driving stacks remains largely unexplored. Existing evaluations abstract away…

Robotics · Computer Science 2026-03-03 Yun Li , Simon Thompson , Yidu Zhang , Ehsan Javanmardi , Manabu Tsukada

Microservices are used to build complex applications composed of small, independent and highly decoupled processes. Recently, microservices are often mentioned in one breath with container technologies like Docker. That is why operating…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-10-12 Nane Kratzke

Traditional memory management suffers from metadata overhead, architectural complexity, and stability degradation, problems intensified in cloud environments. Existing software/hardware optimizations are insufficient for cloud computing's…

The rapid adoption of large language models (LLMs) is pushing AI accelerators toward increasingly powerful and specialized designs. Instead of further complicating software development with deeply hierarchical scratchpad memories (SPMs) and…

Hardware Architecture · Computer Science 2025-12-09 Zhongchun Zhou , Chengtao Lai , Yuhang Gu , Wei Zhang

Modern distributed file systems rely on uncoordinated, per node page caches that replicate hot data locally across the cluster. While ensuring fast local access, this architecture underutilizes aggregate cluster DRAM capacity through…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-04-22 Shai Bergman , Zhe Yang , Julien Eudine , Giorgio Negro , Onur Mutlu , Arash Tavakkol , Ji Zhang

In this paper, we present a SRAM-PCM hybrid cache design, along with a cache replacement policy, named dead fast block (DFB) to manage the hybrid cache. This design aims to leverage the best features of both SRAM and PCM devices. Compared…

Hardware Architecture · Computer Science 2013-11-04 Sparsh Mittal