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Compute-in-Memory (CIM) and weight sparsity are two effective techniques to reduce data movement during Neural Network (NN) inference. However, they can hardly be employed in the same accelerator simultaneously because CIM requires…

Hardware Architecture · Computer Science 2025-11-19 Weiping Yang , Shilin Zhou , Hui Xu , Yujiao Nie , Qimin Zhou , Zhiwei Li , Changlin Chen

In the quest for low power, bio-inspired computation both memristive and memcapacitive-based Artificial Neural Networks (ANN) have been the subjects of increasing focus for hardware implementation of neuromorphic computing. One step…

Neural and Evolutionary Computing · Computer Science 2022-06-22 Sachin Maheshwari , Alexander Serb , Christos Papavassiliou , Themistoklis Prodromakis

Resistive random-access memory (ReRAM) crossbar arrays are suitable for efficient inference computations in neural networks due to their analog general matrix-matrix multiplication (GEMM) capabilities. However, traditional ReRAM-based…

Hardware Architecture · Computer Science 2024-09-26 Hery Shin , Jae-Young Kim , Donghyuk Kim , Joo-Young Kim

Convolutional neural network (CNN) inference on mobile devices demands efficient hardware acceleration of low-precision (INT8) general matrix multiplication (GEMM). Exploiting data sparsity is a common approach to further accelerate GEMM…

Hardware Architecture · Computer Science 2020-10-14 Zhi-Gang Liu , Paul N. Whatmough , Matthew Mattina

Compute in-memory (CIM) is a promising technique that minimizes data transport, the primary performance bottleneck and energy cost of most data intensive applications. This has found wide-spread adoption in accelerating neural networks for…

Hardware Architecture · Computer Science 2020-08-18 Brian Crafton , Samuel Spetalnick , Gauthaman Murali , Tushar Krishna , Sung-Kyu Lim , Arijit Raychowdhury

RRAM crossbars have been studied to construct in-memory accelerators for neural network applications due to their in-situ computing capability. However, prior RRAM-based accelerators show efficiency degradation when executing the popular…

Hardware Architecture · Computer Science 2024-02-01 Yifeng Zhai , Bing Li , Bonan Yan , Jing Wang

Though CNNs are highly parallel workloads, in the absence of efficient on-chip memory reuse techniques, an accelerator for them quickly becomes memory bound. In this paper, we propose a CNN accelerator design for inference that is able to…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-08-26 Kingshuk Majumder , Shubham Nema , Uday Bondhugula

Deep learning-based recommendation models (DLRMs) are widely deployed in commercial applications to enhance user experience. However, the large and sparse embedding layers in these models impose substantial memory bandwidth bottlenecks due…

Hardware Architecture · Computer Science 2025-09-16 Yu-Hong Lai , Chieh-Lin Tsai , Wen Sheng Lim , Han-Wen Hu , Tei-Wei Kuo , Yuan-Hao Chang

Emerging ReRAM-based accelerators process neural networks via analog Computing-in-Memory (CiM) for ultra-high energy efficiency. However, significant overhead in peripheral circuits and complex nonlinear activation modes constrain system…

Hardware Architecture · Computer Science 2024-12-31 Peng Dang , Huawei Li , Wei Wang

Conventional computing paradigm struggles to fulfill the rapidly growing demands from emerging applications, especially those for machine intelligence, because much of the power and energy is consumed by constant data transfers between…

Graph neural networks (GNNs) have gained significant interest for applications such as citation network analysis and drug discovery due to their ability to apply machine learning techniques on graph-structured data. GNNs typically employ a…

Hardware Architecture · Computer Science 2026-05-28 Siddhartha Raman Sundara Raman , Lizy John , Jaydeep P. Kulkarni

Convolutional Neural Networks (CNNs) have begun to permeate all corners of electronic society (from voice recognition to scene generation) due to their high accuracy and machine efficiency per operation. At their core, CNN computations are…

Neural and Evolutionary Computing · Computer Science 2018-04-19 Kartik Hegde , Jiyong Yu , Rohit Agrawal , Mengjia Yan , Michael Pellauer , Christopher W. Fletcher

Recent works demonstrated the promise of using resistive random access memory (ReRAM) as an emerging technology to perform inherently parallel analog domain in-situ matrix-vector multiplication -- the intensive and key computation in DNNs.…

Hardware Architecture · Computer Science 2021-06-18 Geng Yuan , Payman Behnam , Zhengang Li , Ali Shafiee , Sheng Lin , Xiaolong Ma , Hang Liu , Xuehai Qian , Mahdi Nazm Bojnordi , Yanzhi Wang , Caiwen Ding

Redox-based resistive switching devices (ReRAM) are an emerging class of non-volatile storage elements suited for nanoscale memory applications. In terms of logic operations, ReRAM devices were suggested to be used as programmable…

Emerging Technologies · Computer Science 2015-03-02 A. Siemon , S. Menzel , R. Waser , E. Linn

ReRAM-based accelerators exhibit enormous potential to increase computational efficiency for DNN inference tasks, delivering significant performance and energy savings over traditional platforms. By incorporating adaptive scheduling, these…

Hardware Architecture · Computer Science 2025-02-05 Mohammad Sabri , Marc Riera , Antonio Gonzalez

Resistive Random-Access-Memory (ReRAM) crossbar is a promising technique for deep neural network (DNN) accelerators, thanks to its in-memory and in-situ analog computing abilities for Vector-Matrix Multiplication-and-Accumulations (VMMs).…

Hardware Architecture · Computer Science 2021-03-03 Fangxin Liu , Wenbo Zhao , Yilong Zhao , Zongwu Wang , Tao Yang , Zhezhi He , Naifeng Jing , Xiaoyao Liang , Li Jiang

Deep neural networks are widely deployed in many fields. Due to the in-situ computation (known as processing in memory) capacity of the Resistive Random Access Memory (ReRAM) crossbar, ReRAM-based accelerator shows potential in accelerating…

Hardware Architecture · Computer Science 2024-03-11 Chenguang Zhang , Zhihang Yuan , Xingchen Li , Guangyu Sun

Convolutional neural networks (CNN) have achieved excellent performance on various tasks, but deploying CNN to edge is constrained by the high energy consumption of convolution operation. Stochastic computing (SC) is an attractive paradigm…

Signal Processing · Electrical Eng. & Systems 2019-07-04 Xinyue Zhang , Jiahao Song , Yuan Wang , Yawen Zhang , Zuodong Zhang , Runsheng Wang , Ru Huang

To achieve high accuracy, convolutional neural networks (CNNs) are increasingly growing in complexity and diversity in layer types and topologies. This makes it very challenging to efficiently deploy such networks on custom processor…

Systems and Control · Electrical Eng. & Systems 2024-06-21 Steven Colleman , Man Shi , Marian Verhelst

The inherent diversity of computation types within the deep neural network (DNN) models often requires a variety of specialized units in hardware processors, which limits computational efficiency, increasing both inference latency and power…

Machine Learning · Computer Science 2024-08-21 Ruiqi Sun , Siwei Ye , Jie Zhao , Xin He , Jianzhe Lin , Yiran Li , An Zou