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Large Language Model (LLM) inference requires substantial computational resources, yet CPU-based inference remains essential for democratizing AI due to the widespread availability of CPUs compared to specialized accelerators. However,…

Hardware Architecture · Computer Science 2025-10-01 Jingyao Zhang , Jaewoo Park , Jongeun Lee , Elaheh Sadredini

Low-rank adaptation (LoRA) is a predominant parameter-efficient finetuning method for adapting large language models (LLMs) to downstream tasks. Meanwhile, Compute-in-Memory (CIM) architectures demonstrate superior energy efficiency due to…

Computation and Language · Computer Science 2026-03-10 Taiqiang Wu , Chenchen Ding , Wenyong Zhou , Yuxin Cheng , Xincheng Feng , Shuqi Wang , Wendong Xu , Chufan Shi , Zhengwu Liu , Ngai Wong

Clustered Federated Multi-task Learning (CFL) has emerged as a promising technique to address statistical challenges, particularly with non-independent and identically distributed (non-IID) data across users. However, existing CFL studies…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-12-24 Moqbel Hamood , Abdullatif Albaseer , Mohamed Abdallah , Ala Al-Fuqaha

Stochastic computing (SC) has emerged as an efficient low-power alternative for deploying neural networks (NNs) in resource-limited scenarios, such as the Internet of Things (IoT). By encoding values as serial bitstreams, SC significantly…

Machine Learning · Computer Science 2025-08-14 Ziheng Wang , Pedro Reviriego , Farzad Niknia , Zhen Gao , Javier Conde , Shanshan Liu , Fabrizio Lombardi

The byte-addressable Non-Volatile Memory (NVM) is a promising technology since it simultaneously provides DRAM-like performance, disk-like capacity, and persistency. The current NVM deployment is symmetric, where NVM devices are directly…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-01-31 Teng Ma , Mingxing Zhang , Kang Chen , Xuehai Qian , Yongwei Wu

The SRAM cell is made up of latch, which ensures that the cell data is preserved as long as power is turned on and refresh operation is not required for the SRAM cell. SRAM is widely used for on-chip cache memory in microprocessors, game…

Hardware Architecture · Computer Science 2019-05-22 Apollos Ezeogu

Non-volatile memory (NVM) provides a scalable and power-efficient solution to replace DRAM as main memory. However, because of relatively high latency and low bandwidth of NVM, NVM is often paired with DRAM to build a heterogeneous memory…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-05-03 Kai Wu , Yingchao Huang , Dong Li

Phase-change memory (PCM) devices have multiple banks to serve memory requests in parallel. Unfortunately, if two requests go to the same bank, they have to be served one after another, leading to lower system performance. We observe that a…

Hardware Architecture · Computer Science 2019-08-22 Shihao Song , Anup Das , Onur Mutlu , Nagarajan Kandasamy

This paper summarizes our work on experimentally analyzing, exploiting, and addressing vulnerabilities in multi-level cell NAND flash memory programming, which was published in the industrial session of HPCA 2017, and examines the work's…

Hardware Architecture · Computer Science 2018-05-10 Yu Cai , Saugata Ghose , Yixin Luo , Ken Mai , Onur Mutlu , Erich F. Haratsch

AI-powered edge devices currently lack the ability to adapt their embedded inference models to the ever-changing environment. To tackle this issue, Continual Learning (CL) strategies aim at incrementally improving the decision capabilities…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-07-28 Leonardo Ravaglia , Manuele Rusci , Alessandro Capotondi , Francesco Conti , Lorenzo Pellegrini , Vincenzo Lomonaco , Davide Maltoni , Luca Benini

Deep learning (DL) algorithms rely on massive amounts of labeled data. Semi-supervised learning (SSL) and active learning (AL) aim to reduce this label complexity by leveraging unlabeled data or carefully acquiring labels, respectively. In…

Machine Learning · Computer Science 2023-02-16 Seo Taek Kong , Soomin Jeon , Dongbin Na , Jaewon Lee , Hong-Seok Lee , Kyu-Hwan Jung

Due to increasing cache sizes and large leakage consumption of SRAM device, conventional SRAM caches contribute significantly to the processor power consumption. Recently researchers have used non-volatile memory devices to design caches,…

Hardware Architecture · Computer Science 2014-05-01 Sparsh Mittal

The proliferation of end devices has led to a distributed computing paradigm, wherein on-device machine learning models continuously process diverse data generated by these devices. The dynamic nature of this data, characterized by…

Machine Learning · Computer Science 2025-05-02 Zhengyi Zhong , Weidong Bao , Ji Wang , Jianguo Chen , Lingjuan Lyu , Wei Yang Bryan Lim

High-performance computing (HPC) applications are increasingly executed in heterogeneous environments, introducing new challenges for programming and software portability. SYCL has emerged as a leading model designed to simplify…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-04-20 Ami Marowka

Current multimodal large lanauge models possess strong perceptual and reasoning capabilities, however high computational and memory requirements make them difficult to deploy directly on on-device environments. While small-parameter models…

Large language models (LLMs) are increasingly being deployed on mobile devices, but the limited DRAM capacity constrains the deployable model size. This paper introduces ActiveFlow, the first LLM inference framework that can achieve…

Machine Learning · Computer Science 2025-09-24 Fucheng Jia , Zewen Wu , Shiqi Jiang , Huiqiang Jiang , Qianxi Zhang , Yuqing Yang , Yunxin Liu , Ju Ren , Deyu Zhang , Ting Cao

A three-dimensional (3D) Network-on-Chip (NoC) enables the design of high performance and low power many-core chips. Existing 3D NoCs are inadequate for meeting the ever-increasing performance requirements of many-core processors since they…

Emerging Technologies · Computer Science 2016-08-26 Sourav Das , Janardhan Rao Doppa , Partha Pratim Pande , Krishnendu Chakrabarty

Multi-label classification (MLC) refers to the problem of tagging a given instance with a set of relevant labels. Most existing MLC methods are based on the assumption that the correlation of two labels in each label pair is symmetric,…

Machine Learning · Computer Science 2024-10-04 Xingyu Zhao , Yuexuan An , Lei Qi , Xin Geng

Non-volatile memory (NVM) is an emerging technology, which has the persistence characteristics of large capacity storage devices(e.g., HDDs and SSDs), while providing the low access latency and byte-addressablity of traditional DRAM memory.…

Databases · Computer Science 2020-05-18 Yinjun Wu , Kwanghyun Park , Rathijit Sen , Brian Kroth , Jaeyoung Do

Seamless continuity is the main goal and challenge in fourth generation Wireless networks (FGWNs), to achieve seamless connectivity "HANDOVER" technique is used,Handover mechanism are mainly used when a mobile terminal(MT) is in overlapping…

Networking and Internet Architecture · Computer Science 2012-04-01 K. Savitha , C. Chandrasekar