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Processing-in-memory (PIM) architectures have seen an increase in popularity recently, as the high internal bandwidth available within 3D-stacked memory provides greater incentive to move some computation into the logic layer of the memory.…

Due to amount of data involved in emerging deep learning and big data applications, operations related to data movement have quickly become the bottleneck. Data-centric computing (DCC), as enabled by processing-in-memory (PIM) and…

Hardware Architecture · Computer Science 2020-09-22 Kamil Khan , Sudeep Pasricha , Ryan Gary Kim

The rise of data-intensive applications exposed the limitations of conventional processor-centric von-Neumann architectures that struggle to meet the off-chip memory bandwidth demand. Therefore, recent innovations in computer architecture…

Hardware Architecture · Computer Science 2024-05-28 Asif Ali Khan , Hamid Farzaneh , Karl F. A. Friebel , Clément Fournier , Lorenzo Chelini , Jeronimo Castrillon

Processing-in-memory (PIM) seeks to eliminate computation/memory data transfer using devices that support both storage and logic. Stateful logic techniques such as IMPLY, MAGIC and FELIX can perform logic gates within memristive crossbar…

Hardware Architecture · Computer Science 2021-09-21 Orian Leitersdorf , Ronny Ronen , Shahar Kvatinsky

Realizing today's cloud-level artificial intelligence functionalities directly on devices distributed at the edge of the internet calls for edge hardware capable of processing multiple modalities of sensory data (e.g. video, audio) at…

Memristor-based crossbar arrays represent a promising emerging memory technology to replace conventional memories by offering a high density and enabling computing-in-memory (CIM) paradigms. While analog computing provides the best…

While deep neural network (DNN)-based video denoising has demonstrated significant performance, deploying state-of-the-art models on edge devices remains challenging due to stringent real-time and energy efficiency requirements.…

Computer Vision and Pattern Recognition · Computer Science 2025-05-29 Shan Gao , Zhiqiang Wu , Yawen Niu , Xiaotao Li , Qingqing Xu

In recent years, there is an increasing demand of big memory systems so to perform large scale data analytics. Since DRAM memories are expensive, some researchers are suggesting to use other memory systems such as non-volatile memory (NVM)…

Performance · Computer Science 2016-10-03 Gaoying Ju , Yongkun Li , Yinlong Xu , Jiqiang Chen , John C. S. Lui

Recent dual in-line memory modules (DIMMs) are starting to support processing-in-memory (PIM) by associating their memory banks with processing elements (PEs), allowing applications to overcome the data movement bottleneck by offloading…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-04-16 Si Ung Noh , Junguk Hong , Chaemin Lim , Seongyeon Park , Jeehyun Kim , Hanjun Kim , Youngsok Kim , Jinho Lee

In the era of artificial intelligence (AI), Transformer demonstrates its performance across various applications. The excessive amount of parameters incurs high latency and energy overhead when processed in the von Neumann architecture.…

Hardware Architecture · Computer Science 2025-02-14 Jae-Young Kim , Donghyuk Kim , Seungjae Yoo , Sungyeob Yoo , Teokkyu Suh , Joo-Young Kim

Current Artificial Intelligence (AI) computation systems face challenges, primarily from the memory-wall issue, limiting overall system-level performance, especially for Edge devices with constrained battery budgets, such as smartphones,…

Hardware Architecture · Computer Science 2024-10-15 Lucas Huijbregts , Liu Hsiao-Hsuan , Paul Detterer , Said Hamdioui , Amirreza Yousefzadeh , Rajendra Bishnoi

In-memory-computing is emerging as an efficient hardware paradigm for deep neural network accelerators at the edge, enabling to break the memory wall and exploit massive computational parallelism. Two design models have surged: analog…

Hardware Architecture · Computer Science 2023-05-31 Pouya Houshmand , Jiacong Sun , Marian Verhelst

The exponential growth of artificial intelligence (AI) applications has exposed the inefficiency of conventional von Neumann architectures, where frequent data transfers between compute units and memory create significant energy and latency…

Hardware Architecture · Computer Science 2026-03-18 James Read , Ming-Yen Lee , Wei-Hsing Huang , Yuan-Chun Luo , Anni Lu , Shimeng Yu

Graphics Processing Units (GPUs) leverage massive parallelism and large memory bandwidth to support high-performance computing applications, such as multimedia rendering, crypto-mining, deep learning, and natural language processing. These…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-11-11 Nurlan Nazaraliyev , Elaheh Sadredini , Nael Abu-Ghazaleh

Neural Radiance Fields (NeRF) offer significant promise for generating photorealistic images and videos. However, existing mainstream neural rendering models often fall short in meeting the demands for immediacy and power efficiency in…

Hardware Architecture · Computer Science 2025-08-05 Fangxin Liu , Haomin Li , Bowen Zhu , Zongwu Wang , Zhuoran Song , Habing Guan , Li Jiang

With the rapid advent of generative models, efficiently deploying these models on specialized hardware has become critical. Tensor Processing Units (TPUs) are designed to accelerate AI workloads, but their high power consumption…

Hardware Architecture · Computer Science 2025-03-04 Zhantong Zhu , Hongou Li , Wenjie Ren , Meng Wu , Le Ye , Ru Huang , Tianyu Jia

The present manuscript deals with the realization of Processing In-memory (PIM) computing architecture using Quantum Dot Cellular Automata (QCA) and Akers array. The PIM computing architecture becomes popular due to its effective framework…

Emerging Technologies · Computer Science 2016-10-03 P. P. Chougule , B. Sen , T. D. Dongale

A trend towards energy-efficiency, security and privacy has led to a recent focus on deploying DNNs on microcontrollers. However, limits on compute and memory resources restrict the size and the complexity of the ML models deployable in…

Machine Learning · Computer Science 2020-10-19 Fernando García-Redondo , Shidhartha Das , Glen Rosendale

Compute-in-memory (CIM) techniques are widely employed in energy-efficient artificial intelligent (AI) processors. They alleviate power and latency bottlenecks caused by extensive data movements between compute and storage units. To extend…

Hardware Architecture · Computer Science 2025-12-15 Jianyi Yu , Tengxiao Wang , Yuxuan Wang , Xiang Fu , Fei Qiao , Ying Wang , Rui Yuan , Liyuan Liu , Cong Shi

Processing-in-Memory (PIM) is a promising approach to overcoming the memory-wall bottleneck. However, the PIM community has largely treated its two fundamental data layouts, Bit-Parallel (BP) and Bit-Serial (BS), as if they were…

Hardware Architecture · Computer Science 2025-10-01 Jingyao Zhang , Elaheh Sadredini
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