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State of the art time automatic speech recognition (ASR) systems are becoming increasingly complex and expensive for practical applications. This paper presents the development of a high performance and low-footprint 4-bit quantized LF-MMI…

The discrete Fourier transform (DFT) is widely employed for multi-beam digital beamforming. The DFT can be efficiently implemented through the use of fast Fourier transform (FFT) algorithms, thus reducing chip area, power consumption,…

Analog to digital converters (ADCs) are a major contributor to the power consumption of multiple-input multiple-output (MIMO) receivers in large bandwidth millimeter-wave systems. Prior works have considered two mitigating solutions to…

The use of 1-bit analog-to-digital converters (ADCs) is seen as a promising approach to significantly reduce the power consumption and hardware cost of multiple-input multiple-output (MIMO) receivers. However, the nonlinear distortion due…

Energy-efficient signal processing systems require estimation methods operating on data collected with low-complexity devices. Using analog-to-digital converters (ADC) with $1$-bit amplitude resolution has been identified as a possible…

With the advent of the 5G wireless networks, achieving tens of gigabits per second throughputs and low, milliseconds, latency has become a reality. This level of performance will fuel numerous real-time applications, such as autonomy and…

Digital beamforming and waveform generation techniques in MIMO radar offer enormous advantages in terms of flexibility and performance compared to conventional radar systems based on analog implementations. To allow for such fully digital…

Three generations of full-custom analog integrated circuits designed for low-power, high-speed sampling of Radio-Frequency (RF) transients in excess of the Nyquist minimum have been developed. These 0.25$\mu m$ CMOS devices are denoted the…

Charge-domain compute-in-memory (CIM) SRAMs have recently become an enticing compromise between computing efficiency and accuracy to process sub-8b convolutional neural networks (CNNs) at the edge. Yet, they commonly make use of a fixed…

In this work, we investigate dynamic oversampling techniques for large-scale multiple-antenna systems equipped with low-cost and low-power 1-bit analog-to-digital converters at the base stations. To compensate for the performance loss…

Smarty is a fully-reconfigurable on-chip feed-forward artificial neural network (ANN) with ten integrated time-to-digital converters (TDCs) designed in a 16 nm FinFET CMOS technology node. The integration of TDCs together with an ANN aims…

This paper presents a new auto zeroing technique that combines very high-speed operation, low power consumption, and low input switching interferences. This technique has been applied to the design of CMOS flash Analog-to-Digital converter…

At BESSY the standard 16 bit resolution of the corrector power supplies was insufficient for the continous orbit drift correction. A new sophisticated design of the analog/digital I/O board increases the resolution of the analog output up…

We present design and simulation of a Josephson parametric amplifier with bandwidth exceeding 1.6 GHz, and with high saturation power approaching -90 dBm at a gain of 22.8 dB. An improvement by a factor of roughly 50 in bandwidth over the…

Communication systems with low-resolution analog-to-digital-converters (ADCs) can exploit channel state information at the transmitter and receiver. This paper presents codebook designs and performance analyses for limited feedback MIMO…

One of the limitations of conventional VCO-ADCs is the restriction to first-order noise shaping. True-VCO architectures have been proposed to increase the noise-shaping order by cascading several VCO integrators, but without requiring…

A channel with continuous phase modulation and 1-bit ADC with oversampling is considered. Due to oversampling, higher-order modulations yield a higher achievable rate and this work presents a method to approach this with sophisticated…

A 64-channel mixed-mode ASIC, suitable for particle detectors of large dynamic range and high capacitance up to hundreds of pF, is presented here. Each channel features an analogue front-end for signal amplification and filtering, and a…

The Compressive Sensing (CS) framework aims to ease the burden on analog-to-digital converters (ADCs) by reducing the sampling rate required to acquire and stably recover sparse signals. Practical ADCs not only sample but also quantize each…

Low-resolution digital-to-analog and analog-to-digital converters (DACs and ADCs) have attracted considerable attention in efforts to reduce power consumption in millimeter wave (mmWave) and massive MIMO systems. This paper presents an…