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In-memory key-value stores provide consistent low-latency access to all objects which is important for interactive large-scale applications like social media networks or online graph analytics and also opens up new application areas. But,…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-07-17 Kevin Beineke , Stefan Nothaas , Michael Schoettner

The initial location of data in DRAMs is determined and controlled by the 'address-mapping' and even modern memory controllers use a fixed and run-time-agnostic address mapping. On the other hand, the memory access pattern seen at the…

Hardware Architecture · Computer Science 2015-09-15 Mohsen Ghasempour , Jim Garside , Aamer Jaleel , Mikel Luján

We propose a novel computing runtime that exposes remote compute devices via the cross-vendor open heterogeneous computing standard OpenCL and can execute compute tasks on the MEC cluster side across multiple servers in a scalable manner.…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-09-16 Jan Solanti , Michal Babej , Julius Ikkala , Pekka Jääskeläinen

Rate splitting multiple access (RSMA) and non-orthogonal multiple access (NOMA) are the key enabling multiple access techniques to enable massive connectivity. However, it is unclear whether RSMA would consistently outperform NOMA from a…

Information Theory · Computer Science 2023-06-16 Mohammad Amin Saeidi , Hina Tabassum

The advent of RoCE (RDMA over Converged Ethernet) has led to a significant increase in the use of RDMA in datacenter networks. To achieve good performance, RoCE requires a lossless network which is in turn achieved by enabling Priority Flow…

Networking and Internet Architecture · Computer Science 2018-06-22 Radhika Mittal , Alexander Shpiner , Aurojit Panda , Eitan Zahavi , Arvind Krishnamurthy , Sylvia Ratnasamy , Scott Shenker

The integration of multi-access edge computing (MEC) and RAFT consensus makes it feasible to deploy blockchain on trustful base stations and gateways to provide efficient and tamper-proof edge data services for Internet of Things (IoT)…

Cryptography and Security · Computer Science 2021-05-24 Lu Hou , Xiaojun Xu , Kan Zheng , Xianbin Wang

Processing-In-Memory (PIM) is a novel approach that augments existing DRAM memory chips with lightweight logic. By allowing to offload computations to the PIM system, this architecture allows for circumventing the data-bottleneck problem…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-01-18 André Lopes , Daniel Castro , Paolo Romano

Responding to the "datacenter tax" and "killer microseconds" problems for datacenter applications, diverse solutions including Smart NIC-based ones have been proposed. Nonetheless, they often suffer from high overhead of communications over…

Hardware Architecture · Computer Science 2022-10-19 Yifan Yuan , Jinghan Huang , Yan Sun , Tianchen Wang , Jacob Nelson , Dan R. K. Ports , Yipeng Wang , Ren Wang , Charlie Tai , Nam Sung Kim

Homa is a new transport protocol for datacenter networks. It provides exceptionally low latency, especially for workloads with a high volume of very short messages, and it also supports large messages and high network utilization. Homa uses…

Networking and Internet Architecture · Computer Science 2018-06-29 Behnam Montazeri , Yilong Li , Mohammad Alizadeh , John Ousterhout

In last decade, data analytics have rapidly progressed from traditional disk-based processing to modern in-memory processing. However, little effort has been devoted at enhancing performance at micro-architecture level. This paper…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-11-17 Ahsan Javed Awan , Mats Brorsson , Vladimir Vlassov , Eduard Ayguade

As an enhanced version of massive machine-type communication in 5G, massive communication has emerged as one of the six usage scenarios anticipated for 6G, owing to its potential in industrial internet-of-things and smart metering. Driven…

Information Theory · Computer Science 2025-04-17 Yutao Chen , Wei Chen

Rate splitting multiple access (RSMA) is intrinsically amalgamated with simultaneously transmitting and reflecting (STAR) reconfigurable intelligent surfaces (RIS) to enhance energy efficiency (EE) of the finite block length (FBL)…

Signal Processing · Electrical Eng. & Systems 2025-08-04 Mohammad Soleymani , Ignacio Santamaria , Eduard Jorswieck , Robert Schober , Lajos Hanzo

We present NetReduce, a novel RDMA-compatible in-network reduction architecture to accelerate distributed DNN training. Compared to existing designs, NetReduce maintains a reliable connection between end-hosts in the Ethernet and does not…

Networking and Internet Architecture · Computer Science 2020-09-22 Shuo Liu , Qiaoling Wang , Junyi Zhang , Qinliang Lin , Yao Liu , Meng Xu , Ray C. C. Chueng , Jianfei He

Scalable persistent memory (PM) has opened up new opportunities for building indexes that operate and persist data directly on the memory bus, potentially enabling instant recovery, low latency and high throughput. When real PM hardware…

Databases · Computer Science 2022-07-29 Yuliang He , Duo Lu , Kaisong Huang , Tianzheng Wang

High-performance networking is often characterized by kernel bypass which is considered mandatory in high-performance parallel and distributed applications. But kernel bypass comes at a price because it breaks the traditional OS…

Operating Systems · Computer Science 2023-09-06 Maksym Planeta , Jan Bierbaum , Michael Roitzsch , Hermann Härtig

The fast evolving nature of modern cyber threats and network monitoring needs calls for new, "software-defined", approaches to simplify and quicken programming and deployment of online (stream-based) traffic analysis functions. StreaMon is…

Networking and Internet Architecture · Computer Science 2013-11-12 Giuseppe Bianchi , Marco Bonola , Giulio Picierro , Salvatore Pontarelli , Marco Monaci

In-DRAM Processing-In-Memory (DRAM-PIM) has emerged as a promising approach to accelerate memory-intensive workloads by mitigating data transfer overhead between DRAM and the host processor. Bit-serial DRAM-PIM architectures, further…

Hardware Architecture · Computer Science 2025-12-11 Siyuan Ma , Jiajun Hu , Jeeho Ryoo , Aman Arora , Lizy Kurian John

With Dynamic Resource Management (DRM) the resources assigned to a job can be changed dynamically during its execution. From the system's perspective, DRM opens a new level of flexibility in resource allocation and job scheduling and…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-03-27 Dominik Huber , Martin Schreiber , Martin Schulz , Howard Pritchard , Daniel Holmes

Modern high-performance servers commonly integrate Simultaneous Multithreading (SMT) processors, which efficiently boosts throughput over single-threaded cores. Optimizing performance in SMT processors faces challenges due to the…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-02 Marta Navarro , Josué Feliu , Salvador Petit , María E. Gómez , Julio Sahuquillo

Weather forecasting is a fundamental problem for anticipating and mitigating the impacts of climate change. Recently, data-driven approaches for weather forecasting based on deep learning have shown great promise, achieving accuracies that…