Related papers: High Performance GNR Power Gating for Low-Voltage …

Junctionless Nanowire Field-Effect Transistors (JNFETs), where the channel region is uniformly doped without the need for source-channel and drain-channel junctions or lateral doping abruptness, are considered an attractive alternative to…

In this paper, we propose a 'full-stack' solution to designing high capacity and low latency on-chip cache hierarchies by starting at the circuit level of the hardware design stack. First, we propose a novel Gain Cell (GC) design using…

Difficulties in obtaining high-performance p-type transistors and gate insulator charge-trapping effects present two major challenges for III-V complementary metal-oxide semiconductor (CMOS) electronics. We report a p-GaAs nanowire…

The band-to-band tunneling transistors have some performance advantages over the conventional MOSFETs due to the <60mV/dec sub-threshold slope. In this paper, carbon nanotubes are used as a model channel material to address issues that we…

Metals are commonly used as electrostatic gates in devices due to their abundant charge carrier densities that are necessary for efficient charging and discharging. A semiconducting gate can be beneficial for certain fabrication processes,…

Designing the power delivery network (PDN) in very large-scale integrated (VLSI) circuits is increasingly important, especially for nowadays low-power integrated circuit (IC) design. In order to ensure that the designed PDN enables a low…

In graphene nanoribbons (GNRs), the lateral confinement of charge carriers opens a band gap, the key feature to enable novel graphene-based electronics. Successful synthesis of GNRs has triggered efforts to realize field-effect transistors…

Large-scale quantum computing requires cryogenic electronic controllers such as control/readout circuit and routing circuit. However, current technologies face high power dissipation problems, hindering large-scale qubit integration. Here,…

We have developed the combination of an etching and deposition technique that enables the fabrication of locally gated graphene nanostructures of arbitrary design. Employing this method, we have fabricated graphene nanoconstrictions with…

As the demand for high-performance microprocessors increases, the circuit complexity and the rate of data transfer increases resulting in higher power consumption. We propose a clocking architecture that uses a series LC resonance and…

Full Adder is one of the critical parts of logical and arithmetic units. So, presenting a low power full adder cell reduces the power consumption of the entire circuit. Also, using Nano-scale transistors, because of their unique…

By using four layered graphene/gallium nitride (GaN) Schottky diodes with an undoped GaN spacer, we demonstrate highly effective gating of graphene at low bias rendering this type of structure very promising for potential applications. An…

State-of-the-art carbon nanotube field-effect transistors (CNFETs) behave as Schottky barrier (SB)-modulated transistors. It is known that vertical scaling of the gate oxide significantly improves the performance of these devices. However,…

Grid-forming (GFM) technology is widely regarded as a promising solution for future power systems dominated by power electronics. However, a universally accepted definition of GFM behavior and precise method for its quantification remain…

Next-generation (5G/6G) wireless systems demand low-power mm-wave phased-array ICs. Variable-gain LNAs (VGLNAs) are key building blocks enabling hardware complexity reduction, performance enhancement and functionality extension. This paper…

Tunneling field-effect transistors (TFETs) have gained a great deal of recent interest due to their potential to reduce power dissipation in integrated circuits. One major challenge for TFETs so far has been achieving high drive currents,…

A graphene bilayer phototransistor (GBL-PT) is proposed and analyzed. The GBL-PT under consideration has the structure of a field-effect transistor with a GBL as the channel and the back and top gates. The positive bias of the back gate…

Modern microelectronic devices are composed of interfaces between a large number of materials, many of which are in amorphous or polycrystalline phases. Modeling such non-crystalline materials using first-principles methods such as density…

Recurrent neural networks (RNNs) have been a long-standing candidate for processing of temporal sequence data, especially in memory-constrained systems that one may find in embedded edge computing environments. Recent advances in training…

In-time particle trajectory reconstruction in the Large Hadron Collider is challenging due to the high collision rate and numerous particle hits. Using GNN (Graph Neural Network) on FPGA has enabled superior accuracy with flexible…