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The increasing computational demand of Convolutional Neural Networks (CNNs) necessitates energy-efficient acceleration strategies. Compute-in-Memory (CIM) architectures based on Resistive Random Access Memory (RRAM) offer a promising…

Signal Processing · Electrical Eng. & Systems 2025-07-25 José Cubero-Cascante , Rebecca Pelke , Noah Flohr , Arunkumar Vaidyanathan , Rainer Leupers , Jan Moritz Joseph

Being able to learn from complex data with phase information is imperative for many signal processing applications. Today' s real-valued deep neural networks (DNNs) have shown efficiency in latent information analysis but fall short when…

Machine Learning · Computer Science 2021-08-11 Hongwu Peng , Shanglin Zhou , Scott Weitze , Jiaxin Li , Sahidul Islam , Tong Geng , Ang Li , Wei Zhang , Minghu Song , Mimi Xie , Hang Liu , Caiwen Ding

Emerging ReRAM-based accelerators process neural networks via analog Computing-in-Memory (CiM) for ultra-high energy efficiency. However, significant overhead in peripheral circuits and complex nonlinear activation modes constrain system…

Hardware Architecture · Computer Science 2024-12-31 Peng Dang , Huawei Li , Wei Wang

In this work, we introduce bitcell array-based support parameters to improve the prediction accuracy of SRAM-based binarized neural network (SRAM-BNN). Our approach enhances the training weight space of SRAM-BNN while requiring minimal…

Neural and Evolutionary Computing · Computer Science 2019-11-27 Shamma Nasrin , Srikanth Ramakrishna , Theja Tulabandhula , Amit Ranjan Trivedi

Binary Neural Networks (BNNs), neural networks with weights and activations constrained to -1(0) and +1, are an alternative to deep neural networks which offer faster training, lower memory consumption and lightweight models, ideal for use…

Machine Learning · Computer Science 2022-05-23 Kinshuk Dua

The human brain simultaneously optimizes synaptic weights and topology by growing, pruning, and strengthening synapses while performing all computation entirely in memory. In contrast, modern artificial-intelligence systems separate weight…

Hardware Architecture · Computer Science 2025-06-17 Songqi Wang , Yue Zhang , Jia Chen , Xinyuan Zhang , Yi Li , Ning Lin , Yangu He , Jichang Yang , Yingjie Yu , Yi Li , Zhongrui Wang , Xiaojuan Qi , Han Wang

During the last years, algorithms known as Convolutional Neural Networks (CNNs) had become increasingly popular, expanding its application range to several areas. In particular, the image processing field has experienced a remarkable…

Hardware Architecture · Computer Science 2024-08-27 Federico Nicolas Peccia , Luciano Ferreyro , Alejandro Furfaro

The rapidly evolving field of Artificial Intelligence necessitates automated approaches to co-design neural network architecture and neural accelerators to maximize system efficiency and address productivity challenges. To enable joint…

Binary Neural Networks (BNNs), where weights and activations are constrained to binary values (+1, -1), are a highly efficient alternative to traditional neural networks. Unfortunately, typical BNNs, while binarizing linear layers…

Hardware Architecture · Computer Science 2026-01-29 Yuval Harary , Almog Sharoni , Esteban Garzón , Marco Lanuzza , Adam Teman , Leonid Yavits

This article presents design techniques proposed for efficient hardware implementation of feedforward artificial neural networks (ANNs) under parallel and time-multiplexed architectures. To reduce their design complexity, after the weights…

Hardware Architecture · Computer Science 2021-08-05 Mohammadreza Esmali Nojehdeh , Sajjad Parvin , Mustafa Altun

Compute-in-Memory (CIM) and weight sparsity are two effective techniques to reduce data movement during Neural Network (NN) inference. However, they can hardly be employed in the same accelerator simultaneously because CIM requires…

Hardware Architecture · Computer Science 2025-11-19 Weiping Yang , Shilin Zhou , Hui Xu , Yujiao Nie , Qimin Zhou , Zhiwei Li , Changlin Chen

While Deep Neural Networks (DNNs) push the state-of-the-art in many machine learning applications, they often require millions of expensive floating-point operations for each input classification. This computation overhead limits the…

Neural and Evolutionary Computing · Computer Science 2017-05-12 Hokchhay Tann , Soheil Hashemi , Iris Bahar , Sherief Reda

Binarized neural networks (BNNs) are gaining interest in the deep learning community due to their significantly lower computational and memory cost. They are particularly well suited to reconfigurable logic devices, which contain an…

Computer Vision and Pattern Recognition · Computer Science 2017-01-30 Nicholas J. Fraser , Yaman Umuroglu , Giulio Gambardella , Michaela Blott , Philip Leong , Magnus Jahre , Kees Vissers

Batch normalization (BN) is a key facilitator and considered essential for state-of-the-art binary neural networks (BNN). However, the BN layer is costly to calculate and is typically implemented with non-binary parameters, leaving a hurdle…

Machine Learning · Computer Science 2021-04-19 Tianlong Chen , Zhenyu Zhang , Xu Ouyang , Zechun Liu , Zhiqiang Shen , Zhangyang Wang

Different from developing neural networks (NNs) for general-purpose processors, the development for NN chips usually faces with some hardware-specific restrictions, such as limited precision of network signals and parameters, constrained…

Neural and Evolutionary Computing · Computer Science 2018-01-19 Yu Ji , YouHui Zhang , WenGuang Chen , Yuan Xie

Artificial Neural Network computation relies on intensive vector-matrix multiplications. Recently, the emerging nonvolatile memory (NVM) crossbar array showed a feasibility of implementing such operations with high energy efficiency, thus…

Emerging Technologies · Computer Science 2017-04-03 Hyungjun Kim , Taesu Kim , Jinseok Kim , Jae-Joon Kim

Neural networks are an increasingly attractive algorithm for natural language processing and pattern recognition. Deep networks with >50M parameters are made possible by modern GPU clusters operating at <50 pJ per op and more recently,…

Hardware accelerators for convolution neural networks (CNNs) enable real-time applications of artificial intelligence technology. However, most of the existing designs suffer from low hardware utilization or high area cost due to complex…

Hardware Architecture · Computer Science 2022-05-06 Kuo-Wei Chang , Tian-Sheuan Chang

1 bit deep neural networks (DNNs), of which both the activations and weights are binarized , are attracting more and more attention due to their high computational efficiency and low memory requirement . However, the drawback of large…

Computer Vision and Pattern Recognition · Computer Science 2019-07-12 Biao Qian , Yang Wang

Recently, analog compute-in-memory (CIM) architectures based on emerging analog non-volatile memory (NVM) technologies have been explored for deep neural networks (DNN) to improve energy efficiency. Such architectures, however, leverage…

Signal Processing · Electrical Eng. & Systems 2020-08-07 Zhe Wan , Tianyi Wang , Yiming Zhou , Subramanian S. Iyer , Vwani P. Roychowdhury