Related papers: VME Readout at and Below the Conversion Time Limit
NVM-based systems are naturally fit candidates for incorporating periodic checkpointing (or snapshotting). This increases the reliability of the system, makes it more immune to power failures, and reduces wasted work in especially an HPC…
In 2019, the LHCb experiment at CERN will undergo a major upgrade where its detector electronics and the entire readout system will be replaced. The goal is to read-out all events at the full LHC frequency of 40 MHz, reaching a total data…
Event-triggered approach to networked control systems is used to reduce the workload of the communication network. For the static output-feedback continuous event-trigger may generate an infinite number of sampling instants in finite time…
The majority of high energy physics experiments rely on data acquisition and hardware-based trigger systems performing a number of stringent selections before storing data for offline analysis. The online reconstruction and selection…
High-fidelity and rapid readout of a qubit state is key to quantum computing and communication, and it is a prerequisite for quantum error correction. We present a readout scheme for superconducting qubits that combines two microwave…
There is growing interest in visual data management systems that support queries with specialized operations ranging from resizing an image to running complex machine learning models. With a plethora of such operations, the basic need to…
In this paper, we describe a new neuro-inspired, hardware-friendly readout stage for the liquid state machine (LSM), a popular model for reservoir computing. Compared to the parallel perceptron architecture trained by the p-delta algorithm,…
Neural networks are increasingly used in real-time systems, such as automated driving applications. This requires high-performance hardware with predictable timing behavior. State-of-the-art real-time hardware is limited in memory and…
Multicore systems present on-board memory hierarchies and communication networks that influence performance when executing shared memory parallel codes. Characterising this influence is complex, and understanding the effect of particular…
This brief introduces a read bias circuit to improve readout yield of magnetic random access memories (MRAMs). A dynamic bias optimization (DBO) circuit is proposed to enable the real-time tracking of the optimal read voltage across…
This paper studies an online algorithm for an energy harvesting transmitter, where the transmission (completion) time is considered as the system performance. Unlike the existing online algorithms which more or less require the knowledge on…
Spectral efficiency for asynchronous code division multiple access (CDMA) with random spreading is calculated in the large system limit allowing for arbitrary chip waveforms and frequency-flat fading. Signal to interference and noise ratios…
The synapse is a key element of neuromorphic computing in terms of efficiency and accuracy. In this paper, an optimized current-controlled memristive synapse circuit is proposed. Our proposed synapse demonstrates reliability in the face of…
The speed of quantum gates and measurements is a decisive factor for the overall fidelity of quantum protocols when performed on physical qubits with finite coherence time. Reducing the time required to distinguish qubit states with high…
Single-shot spin-state discrimination is essential for semiconductor spin qubits, but conventional threshold-based analysis of spin readout traces becomes unreliable under noisy conditions. Although recent neural-network-based methods…
Data streaming transmission over a block fading channel is studied. It is assumed that the transmitter receives a new message at each channel block at a constant rate, which is fixed by an underlying application, and tries to deliver the…
We study the problem of finding efficient sampling policies in an edge-based feedback system, where sensor samples are offloaded to a back-end server that processes them and generates feedback to a user. Sampling the system at maximum…
The increasing complexity and the short life cycles of embedded systems are pushing the current system-on-chip designs towards a rapid increasing on the number of programmable processing units, while decreasing the gate count for custom…
This work considers the problem of detecting signals from multiple sequentially observed data streams, where only one stream can be observed at every time instant. The goal is to detect signals as quickly as possible while controlling the…
Emerging high-performance storage technologies are opening up the possibility of designing new distributed data acquisition system architectures, in which the live acquisition of data and their processing are decoupled through a storage…