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In this paper, a novel modulation scheme called set partition modulation (SPM) is proposed. In this scheme, set partitioning and ordered subsets in the set partitions are used to form codewords. We define different SPM variants and depict a…

Signal Processing · Electrical Eng. & Systems 2019-10-25 Ferhat Yarkin , Justin P. Coon

We report the use of spin-orbit torque (SOT) magnetoresistive random-access memory (MRAM) to implement a probabilistic binary neural network (PBNN) for resource-saving applications. The in-plane magnetized SOT (i-SOT) MRAM not only enables…

Inefficient data transfer between computation and memory inspired emerging processing-in-memory (PIM) technologies. Many PIM solutions enable storage and processing using memristors in a crossbar-array structure, with techniques such as…

Hardware Architecture · Computer Science 2021-05-11 Orian Leitersdorf , Ben Perach , Ronny Ronen , Shahar Kvatinsky

Conventional computing paradigm struggles to fulfill the rapidly growing demands from emerging applications, especially those for machine intelligence, because much of the power and energy is consumed by constant data transfers between…

Processing-in-Memory (PIM) has emerged as a promising computing paradigm to address the memory wall and the fundamental bottleneck of the von Neumann architecture by reducing costly data movement between memory and processing units. As with…

Hardware Architecture · Computer Science 2025-12-02 Mahdi Aghaei , Saba Ebrahimi , Mohammad Saleh Arafati , Elham Cheshmikhani , Dara Rahmati , Saeid Gorgin , Jungrae Kim

Large Language Models (LLMs) are becoming increasingly data-intensive due to growing model sizes, and they are becoming memory-bound as the context length and, consequently, the key-value (KV) cache size increase. Inference, particularly…

Hardware Architecture · Computer Science 2025-11-18 Khyati Kiyawat , Zhenxing Fan , Yasas Seneviratne , Morteza Baradaran , Akhil Shekar , Zihan Xia , Mingu Kang , Kevin Skadron

3D point cloud neural networks have significantly enhanced the perceptual capabilities of resource-limited mobile intelligent systems. However, despite the transformative impact, the point cloud algorithm suffers from substantial memory…

Hardware Architecture · Computer Science 2026-03-24 Dengfeng Wang , Shunqin Cai , Yanan Sun

In this paper, we propose a novel memory-centric scheme based on CMOS SRAM for acceleration of data intensive applications. Our proposal aims at dynamically increasing the on-chip memory storage capacity of SRAM arrays on-demand. The…

Hardware Architecture · Computer Science 2021-09-08 Haripriya Sheshadri , Shwetha Vijayakumar , Ajey Jacob , Akhilesh Jaiswal

Sparse matrix multiplication is traditionally performed in memory and scales to large matrices using the distributed memory of multiple nodes. In contrast, we scale sparse matrix multiplication beyond memory capacity by implementing sparse…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-11-15 Da Zheng , Disa Mhembere , Vince Lyzinski , Joshua Vogelstein , Carey E. Priebe , Randal Burns

Compute-in-memory (CiM) is a promising approach to improving the computing speed and energy efficiency in dataintensive applications. Beyond existing CiM techniques of bitwise logic-in-memory operations and dot product operations, this…

Hardware Architecture · Computer Science 2023-01-03 Yiming Chen , Yushen Fu , Mingyen Lee , Sumitha George , Yongpan Liu , Vijaykrishnan Narayanan , Huazhong Yang , Xueqing Li

Analog processing-using-memory (PUM; a.k.a. in-memory computing) makes use of electrical interactions inside memory arrays to perform bulk matrix-vector multiplication (MVM) operations. However, many popular matrix-based kernels need to…

Hardware Architecture · Computer Science 2026-05-06 Ryan Wong , Ben Feinberg , Saugata Ghose

Data movement between the main memory and the processor is a key contributor to execution time and energy consumption in memory-intensive applications. This data movement bottleneck can be alleviated using Processing-in-Memory (PiM). One…

Due to the very rapidly growing use of Artificial Neural Networks (ANNs) in real-world applications related to machine learning and Artificial Intelligence (AI), several hardware accelerator de-signs for ANNs have been proposed recently. In…

Hardware Architecture · Computer Science 2021-03-09 Supreeth Mysore Shivanandamurthy , Ishan. G. Thakkar , Sayed Ahmad Salehi

In-memory computing (IMC) with single instruction multiple data (SIMD) setup enables memory to perform operations on the stored data in parallel to achieve high throughput and energy saving. To instruct a SIMD IMC hardware to compute a…

Emerging Technologies · Computer Science 2024-12-04 Xingyue Qian , Chenyang Lv , Zhezhi He , Weikang Qian

In this paper, the intrinsic physical characteristics of spin-orbit torque (SOT) magnetoresistive random-access memory (MRAM) devices are leveraged to realize sigmoidal neurons in neuromorphic architectures. Performance comparisons with the…

Emerging Technologies · Computer Science 2020-06-03 Brendan Reidy , Ramtin Zand

Matrix multiplication is the dominant computation during Machine Learning (ML) inference. To efficiently perform such multiplication operations, Compute-in-memory (CiM) paradigms have emerged as a highly energy efficient solution. However,…

Hardware Architecture · Computer Science 2025-03-03 Tanvi Sharma , Mustafa Ali , Indranil Chakraborty , Kaushik Roy

In-memory computing (IMC) has been shown to be a promising approach for solving binary optimization problems while significantly reducing energy and latency. Building on the advantages of parallel computation, we propose an IMC-compatible…

In-memory computing is a promising alternative to traditional computer designs, as it helps overcome performance limits caused by the separation of memory and processing units. However, many current approaches struggle with unreliable…

Computing in-memory (CiM) has emerged as an attractive technique to mitigate the von-Neumann bottleneck. Current digital CiM approaches for in-memory operands are based on multi-wordline assertion for computing bit-wise Boolean functions…

Hardware Architecture · Computer Science 2022-01-25 Akul Malhotra , Atanu K. Saha , Chunguang Wang , Sumeet K. Gupta

A new device structure for spin transfer torque based magnetic random access memory is proposed for on-chip memory applications. Our device structure exploits spin Hall effect to create a differential memory cell that exhibits fast and…

Mesoscale and Nanoscale Physics · Physics 2014-02-12 Yusung Kim , Sri Harsha Choday , Kaushik Roy
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