Related papers: Real-time Analog Pixel-to-pixel Dynamic Frame Diff…
The ubiquitous use of sensing and signal processing is increasing exponentially with the advance of the Internet of Everything (IoE). In this context, the design of every time more power efficient sensor nodes is a must. Within these nodes,…
The required signal processing rate in future wireless communication systems exceeds the performance of the latest electronics-based processors. Introduction of analog optical computation is one promising direction for energy-efficient…
Image processing has become a critical technology in a variety of science and engineering disciplines. While most image processing is performed digitally, optical analog processing has the advantages of being low-power and high-speed though…
Image processing and edge detection are at the core of several newly emerging technologies, such as augmented reality, autonomous driving and more generally object recognition. Image processing is typically performed digitally using…
CMOS pixel sensors with a small collection electrode combine the advantages of a small sensor capacitance with the advantages of a fully monolithic design. The small sensor capacitance results in a large ratio of signal-to-noise and a low…
This paper considers lossless image compression and presents a learned compression system that can achieve state-of-the-art lossless compression performance but uses only 59K parameters, which is more than 30x less than other learned…
One of the key points in designing an integrated sensing and communication (ISAC) system using computational imaging is the division size of imaging pixels. If the size is too small, it leads to a high number of pixels that need processing.…
Active pixel sensors based on the High-Voltage CMOS technology are being investigated as a viable option for the future pixel tracker of the ATLAS experiment at the High-Luminosity LHC. This paper reports on the testbeam measurements…
In moving camera videos, motion segmentation is commonly performed using the image plane motion of pixels, or optical flow. However, objects that are at different depths from the camera can exhibit different optical flows even if they share…
Analog in-memory computing (AIMC) cores offers significant performance and energy benefits for neural network inference with respect to digital logic (e.g., CPUs). AIMCs accelerate matrix-vector multiplications, which dominate these…
Kernel functions are vital ingredients of several machine learning algorithms, but often incur significant memory and computational costs. We introduce an approach to kernel approximation in machine learning algorithms suitable for…
We have developed two radiation-hard ASICs for optical data transmission in the ATLAS pixel detector at the LHC at CERN: a driver chip for a Vertical Cavity Surface Emitting Laser (VCSEL) diode for 80 Mbit/s data transmission from the…
Emerging non-volatile memory (NVM), or memristive, devices promise energy-efficient realization of deep learning, when efficiently integrated with mixed-signal integrated circuits on a CMOS substrate. Even though several algorithmic…
Some applications in scientific imaging, like space-based high-precision photometry, benefit from a detailed characterization of the sensitivity variation within a pixel. A detailed map of the intra-pixel sensitivity (IPS) allows to…
Sensory processing with neuromorphic systems is typically done by using either event-based sensors or translating input signals to spikes before presenting them to the neuromorphic processor. Here, we offer an alternative approach: direct…
Recent breakthroughs in associative memories suggest that silicon memories are coming closer to human memories, especially for memristive Content Addressable Memories (CAMs) which are capable to read and write in analog values. However, the…
The CLARO-CMOS is an application specific integrated circuit (ASIC) designed for fast photon counting with pixellated photodetectors such as multi-anode photomultiplier tubes (Ma-PMT), micro-channel plates (MCP), and silicon…
We describe a hybrid pixel array detector (EMPAD - electron microscope pixel array detector) adapted for use in electron microscope applications, especially as a universal detector for scanning transmission electron microscopy. The 128 x…
In this paper, we develop an in-memory analog computing (IMAC) architecture realizing both synaptic behavior and activation functions within non-volatile memory arrays. Spin-orbit torque magnetoresistive random-access memory (SOT-MRAM)…
Analog computing using bosonic computational states is a leading approach to surpassing the computational speed and energy limitations of von Neumann architectures. But the challenges of manufacturing large-scale photonic integrated…