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Many hardware structures in today's high-performance out-of-order processors do not scale in an efficient way. To address this, different solutions have been proposed that build execution schedules in an energy-efficient manner. Issue time…

Hardware Architecture · Computer Science 2021-09-08 Andreas Diavastos , Trevor E. Carlson

We study the problem of off-policy evaluation in the multi-armed bandit model with bounded rewards, and develop minimax rate-optimal procedures under three settings. First, when the behavior policy is known, we show that the Switch…

Machine Learning · Statistics 2021-01-20 Cong Ma , Banghua Zhu , Jiantao Jiao , Martin J. Wainwright

Fault tolerance overhead of high performance computing (HPC) applications is becoming critical to the efficient utilization of HPC systems at large scale. HPC applications typically tolerate fail-stop failures by checkpointing. Another…

Distributed, Parallel, and Cluster Computing · Computer Science 2011-06-22 Erlin Yao , Mingyu Chen , Rui Wang , Wenli Zhang , Guangming Tan

Meta-reinforcement learning (RL) addresses the problem of sample inefficiency in deep RL by using experience obtained in past tasks for a new task to be solved. However, most meta-RL methods require partially or fully on-policy data, i.e.,…

Artificial Intelligence · Computer Science 2021-01-07 Takahisa Imagawa , Takuya Hiraoka , Yoshimasa Tsuruoka

Efficient edge caching reduces latency and alleviates backhaul congestion in modern networks. Traditional caching policies, such as Least Recently Used (LRU) and Least Frequently Used (LFU), perform well under specific request patterns. LRU…

Networking and Internet Architecture · Computer Science 2025-12-10 Agrim Bari , Gustavo de Veciana , Yuqi Zhou

Embedded systems have proliferated in various consumer and industrial applications with the evolution of Cyber-Physical Systems and the Internet of Things. These systems are subjected to stringent constraints so that embedded software must…

Cache plays a critical role in reducing the performance gap between CPU and main memory. A modern multi-core CPU generally employs a multi-level hierarchy of caches, through which the most recently and frequently used data are maintained in…

Hardware Architecture · Computer Science 2021-06-01 Rui Wang , Chundong Wang , Chongnan Ye

There is growing importance to detecting faults and implementing the best methods in industrial and real-world systems. We are searching for the most trustworthy and practical data-based fault detection methods proposed by artificial…

Systems and Control · Electrical Eng. & Systems 2023-01-11 Mohammad Hossein Modirrousta , Mahdi Aliyari Shoorehdeli , Mostafa Yari , Arash Ghahremani

This paper investigates intelligent replacement policies for improving the hit-rate of gigascale DRAM caches. Cache replacement policies are commonly used to improve the hit-rate of on-chip caches. The most effective replacement policies…

Hardware Architecture · Computer Science 2019-07-05 Vinson Young , Moinuddin K. Qureshi

Mixture-of-Experts (MoE) models enable sparse expert activation, meaning that only a subset of the model's parameters is used during each inference. However, to translate this sparsity into practical performance, an expert caching mechanism…

Machine Learning · Computer Science 2026-02-05 Duc Hoang , Ajay Jaiswal , Mohammad Samragh , Minsik Cho

Die-stacked DRAM caches are increasingly advocated to bridge the performance gap between on-chip Cache and main memory. It is essential to improve DRAM cache hit rate and lower cache hit latency simultaneously. Prior DRAM cache designs fall…

Hardware Architecture · Computer Science 2018-06-05 Ye Chi

We study online reinforcement learning in linear Markov decision processes with adversarial losses and bandit feedback, without prior knowledge on transitions or access to simulators. We introduce two algorithms that achieve improved regret…

Machine Learning · Computer Science 2023-10-19 Haolin Liu , Chen-Yu Wei , Julian Zimmert

Caching systems have long been crucial for improving the performance of a wide variety of network and web based online applications. In such systems, end-to-end application performance heavily depends on the fraction of objects transferred…

Performance · Computer Science 2021-06-14 Nitish K. Panigrahy , Philippe Nain , Giovanni Neglia , Don Towsley

The goal of off-policy evaluation (OPE) is to evaluate a new policy using historical data obtained via a behavior policy. However, because the contextual bandit algorithm updates the policy based on past observations, the samples are not…

Machine Learning · Computer Science 2020-10-27 Masahiro Kato , Yusuke Kaneko

Reinforcement learning (RL) has achieved remarkable success in fields like robotics and autonomous driving, but adversarial attacks designed to mislead RL systems remain challenging. Existing approaches often rely on modifying the…

Machine Learning · Computer Science 2025-07-25 Junyong Jiang , Buwei Tian , Chenxing Xu , Songze Li , Lu Dong

The stochastic multi-armed bandit problem is a well-known model for studying the exploration-exploitation trade-off. It has significant possible applications in adaptive clinical trials, which allow for dynamic changes in the treatment…

Machine Learning · Computer Science 2019-06-11 Hossein Aboutalebi , Doina Precup , Tibor Schuster

Software caches are an intrinsic component of almost every computer system. Consequently, caching algorithms, particularly eviction policies, are the topic of many papers. Almost all these prior papers evaluate the caching algorithm based…

Performance · Computer Science 2024-11-19 Ziyue Qiu , Juncheng Yang , Mor Harchol-Balter

Off-policy learning and evaluation leverage logged bandit feedback datasets, which contain context, action, propensity score, and feedback for each data point. These scenarios face significant challenges due to high variance and poor…

Machine Learning · Computer Science 2025-06-10 Armin Behnamnia , Gholamali Aminian , Alireza Aghaei , Chengchun Shi , Vincent Y. F. Tan , Hamid R. Rabiee

In this work, we propose MUSTACHE, a new page cache replacement algorithm whose logic is learned from observed memory access requests rather than fixed like existing policies. We formulate the page request prediction problem as a…

Operating Systems · Computer Science 2022-11-07 Gabriele Tolomei , Lorenzo Takanen , Fabio Pinelli

Logic synthesis is the first and most vital step in chip design. This steps converts a chip specification written in a hardware description language (such as Verilog) into an optimized implementation using Boolean logic gates.…

Machine Learning · Computer Science 2023-06-06 Animesh Basak Chowdhury , Marco Romanelli , Benjamin Tan , Ramesh Karri , Siddharth Garg