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As conventional technology scaling approaches physical and power limitations, modern computing systems increasingly face performance bottlenecks arising from memory latency, energy consumption, scalability constraints, and data movement…

Hardware Architecture · Computer Science 2026-05-22 Siddhartha Raman Sundara Raman

Due to the small size of nanoscale devices, they are highly prone to process disturbances which results in manufacturing defects. Some of the defects are randomly distributed throughout the nanodevice layer. Other disturbances tend to be…

Hardware Architecture · Computer Science 2019-07-11 Hossein Pourmeidani , Mehdi Habibi

As technology process node scales down, on-chip SRAM caches lose their efficiency because of their low scalability, high leakage power, and increasing rate of soft errors. Among emerging memory technologies, Spin-Transfer Torque Magnetic…

Hardware Architecture · Computer Science 2022-01-13 Elham Cheshmikhani , Hamed Farbeh , Seyed Ghassem Miremadi , Hossein Asadi

NAND flash-based Solid State Drives (SSDs), which are widely used from embedded systems to enterprise servers, are enhancing performance by exploiting the parallelism of NAND flash memories. To cope with the performance improvement of SSDs,…

Hardware Architecture · Computer Science 2017-04-12 Yeong-Jae Woo , Sang Lyul Min

To support emerging applications ranging from holographic communications to extended reality, next-generation mobile wireless communication systems require ultra-fast and energy-efficient baseband processors. Traditional complementary…

Signal Processing · Electrical Eng. & Systems 2023-08-22 Qunsong Zeng , Jiawei Liu , Mingrui Jiang , Jun Lan , Yi Gong , Zhongrui Wang , Yida Li , Can Li , Jim Ignowski , Kaibin Huang

The memory controller is in charge of managing DRAM maintenance operations (e.g., refresh, RowHammer protection, memory scrubbing) to reliably operate modern DRAM chips. Implementing new maintenance operations often necessitates…

Hardware Architecture · Computer Science 2025-08-07 Hasan Hassan , Ataberk Olgun , A. Giray Yaglikci , Haocong Luo , Onur Mutlu

This paper explores advances in reconfiguration properties of SRAM-based FPGAs, namely Partial Dynamic Reconfiguration, to improve the resilience of critical systems that take advantage of this technology. Commercial of-the-shelf…

Distributed, Parallel, and Cluster Computing · Computer Science 2016-08-24 Jose Luis Nunes

The practical NAND flash memory suffers from various non-stationary noises that are difficult to be predicted. Furthermore, the data retention noise induced channel offset is unknown during the readback process. This severely affects the…

Information Theory · Computer Science 2019-07-10 Zhen Mei , Kui Cai , Xuan He

SSDs are emerging storage devices which unlike HDDs, do not have mechanical parts and therefore, have superior performance compared to HDDs. Due to the high cost of SSDs, entirely replacing HDDs with SSDs is not economically justified.…

Performance · Computer Science 2018-12-12 Reza Salkhordeh , Mostafa Hadizadeh , Hossein Asadi

While containers efficiently implement the idea of operating-system-level application virtualization, they are often insufficient to increase the server utilization to a desirable level. The reason is that in practice many containerized…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-06-26 Jan S. Rellermeyer , Maher Amer , Richard Smutzer , Karthick Rajamani

Main memory database systems aim to provide users with low latency and high throughput access to data. Most data resides in secondary storage, which is limited by the access speed of the technology. For hot content, data resides in DRAM,…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-06-29 Francisco Romero , Benjamin Braun , David Cheriton

The data rate of airborne radar is much higher than the wireless data transfer rate in many detection applications, so the onboard data storage systems are usually used to store the radar data. Data storage systems with good seismic…

Hardware Architecture · Computer Science 2023-03-15 Haishan Tian , Qiong Yang , Huabing Wang , Jingke Zhang

Byte-addressable non-volatile main memory (NVM) demands transactional mechanisms to access and manipulate data on NVM atomically. Those transaction mechanisms often employ a logging mechanism (undo logging or redo logging). However, the…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-04-19 Kai Wu , Jie Ren , Dong Li

Cache serves as a temporary data memory module in many general-purpose processors and domain-specific accelerators. Its density, power, speed, and reliability play a critical role in enhancing the overall system performance and quality of…

Emerging Technologies · Computer Science 2023-02-03 Hongtao Zhong , Zijie Zheng , Leming Jiao , Zuopu Zhou , Chen Sun , Xiaoyang Ma , Vijaykrishnan Narayanan , Huazhong Yang , Kai Ni , Xiao Gong , Xueqing Li

Process simulation are performed in order to simulate the full fabrication process of an alternative nano-flash memory in order to optimise it and to improve the understanding of the dot storage formation. The influence of various…

Many emerging Web services, such as email, photo sharing, and web site archives, need to preserve large amounts of quickly-accessible data indefinitely into the future. In this paper, we make the case that these applications' demands on…

Digital Libraries · Computer Science 2007-05-23 Mary Baker , Mehul Shah , David S. H. Rosenthal , Mema Roussopoulos , Petros Maniatis , TJ Giuli , Prashanth Bungale

The Mixture-of-Experts (MoE) models have emerged as the state-of-the-art paradigm for scaling up large language models (LLMs) without proportionally increased computational cost. However, its on-device deployment faces a critical challenge…

Hardware Architecture · Computer Science 2026-05-25 Weikai Xu , Meng Li , Shuzhang Zhong , Tianyang Luo , Dongxue Zhao , Ling Liang , Zongwei Wang , Qianqian Huang , Yimao Cai , Ru Huang

The error correcting performance of multi-level-cell (MLC) NAND flash memory is closely related to the block length of error correcting codes (ECCs) and log-likelihood-ratios (LLRs) of the read-voltage thresholds. Driven by this issue, this…

Information Theory · Computer Science 2020-04-14 Cheng Wang , Kang Wei , Lingjun Kong , Long Shi , Zhen Mei , Jun Li , Kui Cai

This manuscript summarizes the work and showcases the impact of the doctoral thesis by introducing novel, cost-efficient methods for assessing and enhancing the reliability of DNN hardware accelerators. A comprehensive Systematic Literature…

Hardware Architecture · Computer Science 2026-03-11 Mahdi Taheri

This paper presents Flashmon version 2, a tool for monitoring embedded Linux NAND flash memory I/O requests. It is designed for embedded boards based devices containing raw flash chips. Flashmon is a kernel module and stands for "flash…

Operating Systems · Computer Science 2013-09-09 Pierre Olivier , Jalil Boukhobza , Eric Senn
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