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Memory-centric computing aims to enable computation capability in and near all places where data is generated and stored. As such, it can greatly reduce the large negative performance and energy impact of data access and data movement, by…

Hardware Architecture · Computer Science 2024-12-30 Onur Mutlu , Ataberk Olgun , Geraldo F. Oliveira , Ismail Emir Yuksel

Non-volatile memory (NVM) based compute-in-memory (CIM) accelerators have emerged as a sustainable solution to significantly boost energy efficiency and minimize latency for Deep Neural Networks (DNNs) inference due to their in-situ data…

Hardware Architecture · Computer Science 2025-08-19 Yifan Qin , Zheyu Yan , Wujie Wen , Xiaobo Sharon Hu , Yiyu Shi

Fault tolerance is one of the major design goals for HPC. The emergence of non-volatile memories (NVM) provides a solution to build fault tolerant HPC. Data in NVM-based main memory are not lost when the system crashes because of the…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-05-17 Shuo Yang , Kai Wu , Yifan Qiao , Dong Li , Jidong Zhai

Computing-in-memory with emerging non-volatile memory (nvCiM) is shown to be a promising candidate for accelerating deep neural networks (DNNs) with high energy efficiency. However, most non-volatile memory (NVM) devices suffer from…

Hardware Architecture · Computer Science 2022-05-27 Zheyu Yan , Xiaobo Sharon Hu , Yiyu Shi

The demand for efficient machine learning (ML) accelerators is growing rapidly, driving the development of novel computing concepts such as resistive random access memory (RRAM)-based tiled computing-in-memory (CIM) architectures. CIM…

Hardware Architecture · Computer Science 2024-01-18 Rebecca Pelke , Jose Cubero-Cascante , Nils Bosbach , Felix Staudigl , Rainer Leupers , Jan Moritz Joseph

Modern data-intensive applications face memory latency challenges exacerbated by disaggregated memory systems. Recent work shows that coroutines are promising in effectively interleaving tasks and hiding memory latency, but they struggle to…

Hardware Architecture · Computer Science 2025-11-20 Zhuolun Jiang , Songyue Wang , Xiaokun Pei , Tianyue Lu , Mingyu Chen

State-vector quantum circuit simulation is memory-bandwidth bound, yet the interaction between memory hierarchy, access pattern, and hardware parallelism remains incompletely characterized. We address this using the Apple M4 Pro Unified…

Performance · Computer Science 2026-05-13 Gyan Pratipat

To address the increasing computational demands of artificial intelligence (AI) and big data, compute-in-memory (CIM) integrates memory and processing units into the same physical location, reducing the time and energy overhead of the…

Emerging Technologies · Computer Science 2023-09-19 Xiwen Liu , Keshava Katti , Yunfei He , Paul Jacob , Claudia Richter , Uwe Schroeder , Santosh Kurinec , Pratik Chaudhari , Deep Jariwala

For the problem whether Graphic Processing Unit(GPU),the stream processor with high performance of floating-point computing is applicable to neural networks, this paper proposes the parallel recognition algorithm of Convolutional Neural…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-08-28 Yi-bin Huang , Kang Li , Ge Wang , Min Cao , Pin Li , Yu-jia Zhang

The ever-increasing computation complexity of fastgrowing Deep Neural Networks (DNNs) has requested new computing paradigms to overcome the memory wall in conventional Von Neumann computing architectures. The emerging Computing-In-Memory…

Hardware Architecture · Computer Science 2021-12-14 Kaining Zhou , Yangshuo He , Rui Xiao , Jiayi Liu , Kejie Huang

Numerous multi- or high-dimensional indexes with distinct advantages have been proposed on various platforms to meet application requirements. To achieve higher-performance queries, most indexes employ enhancement methods, including…

Databases · Computer Science 2025-10-24 Ming Sheng , Shuliang Wang , Yong Zhang , Yi Luo , Xianbo Liu , Zeming Li

Non-Volatile Memory (NVM) can deliver higher density and lower cost per bit when compared with DRAM. Its main drawback is that it is slower than DRAM. On the other hand, DRAM has scalability problems due to its cost and energy consumption.…

Performance · Computer Science 2024-12-18 Diego Moura , Vinicius Petrucci , Daniel Mosse

High-performance computing systems are moving towards 2.5D and 3D memory hierarchies, based on High Bandwidth Memory (HBM) and Hybrid Memory Cube (HMC) to mitigate the main memory bottlenecks. This trend is also creating new opportunities…

Hardware Architecture · Computer Science 2017-09-26 Erfan Azarkhish , Davide Rossi , Igor Loi , Luca Benini

Sequence learning is dominated by Transformers and parallelizable recurrent neural networks (RNNs) such as state-space models, yet learning long-term dependencies remains challenging, and state-of-the-art designs trade power consumption for…

Machine Learning · Computer Science 2026-05-13 Julien Brandoit , Arthur Fyon , Damien Ernst , Guillaume Drion

The ever-increasing computation complexity of fast-growing Deep Neural Networks (DNNs) has requested new computing paradigms to overcome the memory wall in conventional Von Neumann computing architectures. The emerging Computing-In-Memory…

Hardware Architecture · Computer Science 2021-07-21 Kaining Zhou , Yangshuo He , Rui Xiao , Kejie Huang

RUMD is a general purpose, high-performance molecular dynamics (MD) simulation package running on graphical processing units (GPU's). RUMD addresses the challenge of utilizing the many-core nature of modern GPU hardware when simulating…

Data movement between memory and processors is a major bottleneck in modern computing systems. The processing-in-memory (PIM) paradigm aims to alleviate this bottleneck by performing computation inside memory chips. Real PIM hardware (e.g.,…

Hardware Architecture · Computer Science 2023-10-04 Jinfan Chen , Juan Gómez-Luna , Izzat El Hajj , Yuxin Guo , Onur Mutlu

The memory demand of virtual machines (VMs) is increasing, while DRAM has limited capacity and high power consumption. Non-volatile memory (NVM) is an alternative to DRAM, but it has high latency and low bandwidth. We observe that the VM…

Operating Systems · Computer Science 2022-09-28 Sai sha , Chuandong Li , Yingwei Luo , Xiaolin Wang , Zhenlin Wang

A modern graphics processing unit (GPU) is able to perform massively parallel scientific computations at low cost. We extend our implementation of the checkerboard algorithm for the two dimensional Ising model [T. Preis et al., J. Comp.…

Computational Physics · Physics 2010-07-22 Benjamin Block , Peter Virnau , Tobias Preis

In-DRAM Processing-In-Memory (DRAM-PIM) has emerged as a promising approach to accelerate memory-intensive workloads by mitigating data transfer overhead between DRAM and the host processor. Bit-serial DRAM-PIM architectures, further…

Hardware Architecture · Computer Science 2025-12-11 Siyuan Ma , Jiajun Hu , Jeeho Ryoo , Aman Arora , Lizy Kurian John