Related papers: Prototype of a multi-host type DAQ front-end syste…
We report a mixed-signal data acquisition (DAQ) system for optically detected magnetic resonance (ODMR) of solid-state spins. This system is designed and implemented based on a Field-Programmable-Gate-Array (FPGA) chip assisted with…
Intermittent computing systems undergo frequent power failure, hindering necessary data sample capture or timely on-device computation. These missing samples and deadlines limit the potential usage of intermittent computing systems in many…
In a growing number of applications, there is a need to digitize a (possibly high) number of correlated signals whose spectral characteristics are challenging for traditional analog-to-digital converters (ADCs). Examples, among others,…
The current trend for domain-specific architectures (DSAs) has led to renewed interest in research test chips to demonstrate new specialized hardware. Tape-outs also offer huge pedagogical value garnered from real hands-on exposure to the…
Integrated sensing and communication (ISAC) is a promising paradigm for future wireless systems due to spectrum reuse, hardware sharing, and joint waveform design. In dynamic scenes, Doppler shifts degrade both sensing and communication,…
To enable user diversity and multiplexing gains, a fully digital precoding multiple input multiple output (MIMO) architecture is typically applied. However, a large number of radio frequency (RF) chains make the system unrealistic to…
Key parameters of analog-to-digital converters (ADCs) are their sampling rate and dynamic range. Power consumption and cost of an ADC are directly proportional to the sampling rate; hence, it is desirable to keep it as low as possible. The…
Given a multiple-input multiple-output (MIMO) channel, feedback from the receiver can be used to specify a transmit precoding matrix, which selectively activates the strongest channel modes. Here we analyze the performance of Random Vector…
An experiment to search for mu-e conversion named COMET is being constructed at J-PARC. The experiment will be carried out using a two-stage approach of Phase-I and Phase-II. The data taking system of Phase-I is developed based on common…
We propose the analog quantum simulation of generalized Dicke models in trapped ions. By combining bicromatic laser interactions on multiple ions we can generate all regimes of light-matter coupling in these models, where here the light…
Scaling up hardware systems has become an important tactic for improving performance as Moore's law fades. Unfortunately, simulations of large hardware systems are often a design bottleneck due to slow throughput and long build times. In…
The Spin Physics Detector (SPD) experiment at the NICA collider in JINR aims to investigate the spin structure of nucleons and spin-related phenomena. The combination of the number of background processes, the event rate and conditions for…
Dynamic random access memory (DRAM) is critical to classical computing but notably absent in current superconducting quantum processors. Integrating high-coherence memory units would enable resource-efficient control of logical qubits and…
High resolution analog to digital converters (ADCs) are conventionally used at the receiver terminals to store an accurate digital representation of the received signal, thereby allowing for reliable decoding of transmitted messages.…
A low-cost DAQ card has been developed for school-network cosmic ray detector projects, providing digitized data from photomultiplier tubes via a standard serial interface. To facilitate analysis of these data and to provide students with a…
Digital-analog quantum computing (DAQC) is a universal computational paradigm that combines the evolution under an entangling Hamiltonian with the application of single-qubit gates. Since any unitary operation can be decomposed into a…
High power consumption and expensive hardware are two bottlenecks for practical massive multiple-input multiple-output (mMIMO) systems. One promising solution is to employ low-resolution analog-to-digital converters (ADCs) and…
Expanding Deep Learning applications toward edge computing demands architectures capable of delivering high computational performance and efficiency while adhering to tight power and memory constraints. Digital In-Memory Computing (DIMC)…
This paper investigates a hardware-efficient massive multiple-input multiple-output integrated sensing and communication (MIMO-ISAC) system with 1-bit analog-to-digital converters (ADCs)/digital-to-analog converters (DACs). The proposed…
Although CMS will not start operation for several years, many subdetector groups have active testbeam programs involving final or near-final electronics. The high-bandwidth electronics require the development of new DAQ systems including…