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The use and location of memory in integrated circuits plays a key factor in their performance. Memory requires large physical area, access times limit overall system performance and connectivity can result in large fan-out. Modern FPGA…
Low-precision arithmetic operations to accelerate deep-learning applications on field-programmable gate arrays (FPGAs) have been studied extensively, because they offer the potential to save silicon area or increase throughput. However,…
Very deep submicron and nanometer technologies have increased notably integrated circuit (IC) sensitiveness to radiation. Soft errors are currently appearing into ICs working at earth surface. Hardened circuits are currently required in…
On-chip memory (usually based on Static RAMs-SRAMs) are crucial components for various computing devices including heterogeneous devices, e.g., GPUs, FPGAs, ASICs to achieve high performance. Modern workloads such as Deep Neural Networks…
Seamless redundancy layered atop Wi-Fi has been shown able to tangibly increase communication quality, hence offering industry-grade reliability. However, it also implies much higher network traffic, which is often unbearable as the…
Spin qubits need to operate within a very precise voltage space around charge state transitions to achieve high-fidelity gates. However, the stability diagrams that allow the identification of the desired charge states are long to acquire.…
Multimode entanglement is quintessential for the design and fabrication of quantum networks, which play a central role in quantum information processing and quantum metrology. However, an experimental setup is generally constructed with a…
Backscatter is a key technology for battery-free sensing in industrial IoT applications. To fully cover numerous tags in the deployment area, one often needs to deploy multiple readers, each of which communicates with tags within its…
Today's data centers consist of thousands of network-connected hosts, each with CPUs and accelerators such as GPUs and FPGAs. These hosts also contain network interface cards (NICs), operating at speeds of 100Gb/s or higher, that are used…
this paper presents a detailed methodology of a Spiking Neural Network (SNN) based low-power design for radioisotope identification. A low power cost of 72 mW has been achieved on FPGA with the inference accuracy of 100% at 10 cm test…
Various hardware accelerators have been developed for energy-efficient and real-time inference of neural networks on edge devices. However, most training is done on high-performance GPUs or servers, and the huge memory and computing costs…
This paper reports on the development of a resource-efficient FPGA-based neural network regression model for potential applications in the future hardware muon trigger system of the ATLAS experiment at the Large Hadron Collider (LHC).…
Intermittent computing systems operate by relying only on harvested energy accumulated in their tiny energy reservoirs, typically capacitors. An intermittent device dies due to a power failure when there is no energy in its capacitor and…
We optimize theoretically and experimentally the performances of the recently demonstrated modulation transfer protocol [D.-A. Trinh, K. V. Adwaith, M. Branco, A. Rouxel, S. Welinski, P. Berger, F. Goldfarb, and F. Bretenaker, Applied…
In this paper, we study the vulnerability of 5nm node FinFET and nanowire (20nm gate length) and their corresponding SRAM under radiation. Ab initio tools, SRIM, PHITS, and GEANT4, are used to find the Linear Energy Transfer (LET) of…
The rapid emergence of edge computing platforms and large-scale data centers has made power efficiency a primary design constraint, particularly for data-intensive and AI-driven workloads. Field-programmable gate arrays (FPGAs) are…
To reduce operation-and-maintenance expenses (OPEX) and to ensure optical network survivability, optical network operators need to detect and diagnose faults in a timely manner and with high accuracy. With the rapid advancement of telemetry…
The analog signals generated in the read-out electronics of radiation detectors are shaped prior to the digitization in order to improve the signal to noise ratio (SNR). The real amplitude of the analog signal is then obtained using digital…
Predictable execution time upon accessing shared memories in multi-core real-time systems is a stringent requirement. A plethora of existing works focus on the analysis of Double Data Rate Dynamic Random Access Memories (DDR DRAMs), or…
Analog computing has reemerged as a promising avenue for accelerating deep neural networks (DNNs) due to its potential to overcome the energy efficiency and scalability challenges posed by traditional digital architectures. However,…