Related papers: A readout method based on 10 Gigabit Ethernet for …

In September 2008 the Slim5 collaboration submitted a low material budget silicon demonstrator to test with 12 GeV/c protons, at the PS-T9 test-beam at CERN. Inside the reference telescope, two different detectors were placed as device…

Thin planar pixel modules are promising candidates to instrument the inner layers of the new ATLAS pixel detector for HL-LHC, thanks to the reduced contribution to the material budget and their high charge collection efficiency after…

The upcoming High-Luminosity upgrade of the Large Hadron Collider (LHC) necessitates a complete replacement of the ATLAS Inner Detector with the new Inner Tracker (ITk). This upgrade imposes stringent requirements on the associated Detector…

The silicon-on-insulator pixel (SOIPIX) detector is a unique monolithic-structure imaging device currently being developed by the SOIPIX group led by the High Energy Accelerator Research Organization (KEK). The detector team at KEK Photon…

CMOS sensors were successfully implemented in the STAR tracker [1]. LHC experiments have shown that efficient b tagging, reconstruction of displaced vertices and identification of disappearing tracks are necessary. An improved vertex…

The Silicon-On-Insulator PIXel (SOIPIX) detector is a unique monolithic structure imaging device currently being by the SOIPIX group, led by the High Energy Accelerator Research Organization (KEK). Our detector team at the KEK Photon…

CEPC (Circular Electron and Positron Collider) is a large experiment facility proposed by Chinese particle physics community. One of its running option is being the Higgs factory. Calorimeter is the main part of this experiment to measure…

The conventional readout method of the RPC detector uses two sets of orthogonal readout strips placed at the both sides of the gas gap to collect signals of opposite polarities to obtain space points. A new readout method utilizing the…

Modern PET scanners based on scintillating crystals use solid state photo detectors for light readout. The small area of these devices is beneficial for spatial resolution, but also leads to a large number of electronic channels to be read…

In MicroPattern Gas Detectors (MPGD) when the pixel size is below 100 micron and the number of pixels is large (above 1000) it is virtually impossible to use the conventional PCB read-out approach to bring the signal charge from the…

COFFEE series is a HVCMOS pixel sensor using the advanced 55 nm process, currently being developed for the Upstream Pixel (UP) tracker of the LHCb Upgrade II. To ensure that COFFEE will be able to handle the particle hit rates at UP…

Hyperspectral cameras generate a large amount of data due to the presence of hundreds of spectral bands as opposed to only three channels (red, green, and blue) in traditional cameras. This requires a significant amount of data transmission…

The upgrades of the Belle experiment and the KEKB accelerator aim to increase the data set of the experiment by the factor 50. This will be achieved by increasing the luminosity of the accelerator which requires a significant upgrade of the…

Embedded field programmable gate array (eFPGA) technology allows the implementation of reconfigurable logic within the design of an application-specific integrated circuit (ASIC). This approach offers the low power and efficiency of an ASIC…

For large scale applications, hybrid pixel detectors, in which sensor and read-out IC are separate entities, constitute the state of the art in pixel detector technology to date. They have been developed and start to be used as tracking…

The integrated optical circuit is a promising architecture for the realization of complex quantum optical states and information networks. One element that is required for many of these applications is a high-efficiency photon detector…

Test measurements on the silicon pixel detector for the beam trajectory monitor at the free electron laser of the TESLA test facility are presented. To determine the electronic noise of detector and read-out and to calibrate the signal…

A 100um thick silicon detector with 1mm2 pad readout optimized for sub-nanosecond time resolution has been developed and tested. Coupled to a purposely developed amplifier based on SiGe HBT technology, this detector was characterized at the…

We present an FPGA-based readout chip emulator board for the CMS Endcap Timing Layer (ETL) detector upgrade. The emulator board uses an Intel Cyclone 10 GX FPGA to emulate the digital functions of four Endcap Layer Readout Chips (ETROCs).…

The radiation hardness of passive CMOS pixel sensors fabricated in 150 nm LFoundry technology is investigated. CMOS process lines are especially of interest for large-scale silicon detectors as they offer high production throughput at…