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While standard cell layouts are drawn with minimum design rules to maximize the benefit of design area shrinkage, the complicated design rules have caused difficulties with signal routes accessing the pins in standard cell layouts. As a…
At advanced process nodes, lithography weakpoints can exist in physical layouts of integrated circuit designs even if the layouts pass design rule checking (DRC). Existence of lithography weakpoints in a physical layout can cause…
Standard cell libraries are the foundation for the entire backend design and optimization flow in modern application-specific integrated circuit designs. At 7nm technology node and beyond, standard cell library design and optimization is…
Pattern matching design verification has gained noticeable attention in semiconductor technologies as it can precisely identify more localized problematic areas (weakpoints) in the layout. To address these weakpoints, engineers adopt…
Integrated Circuits (ICs) are the target of diverse attacks during their lifetime. Fabrication-time attacks, such as the insertion of Hardware Trojans, can give an adversary access to privileged data and/or the means to corrupt the IC's…
Irregular memory access patterns pose performance and user productivity challenges on distributed-memory systems. They can lead to fine-grained remote communication and the data access patterns are often not known until runtime. The…
The development of a standard cell library involves characterization of a number of gate-level circuits at various cell-level abstractions. Verifying the behavior of these cells largely depends on the manual skills of the circuit designers.…
In cellular networks, base stations broadcast configurations that devices use for the random access procedure, which is a vital part of the connection setup. Ideally, the network should choose configurations based on the deployment scenario…
Advanced nodes decouple contacted poly pitch (CPP) and lower-metal pitch to improve routability. We present CPCell, an efficient standard-cell layout generation framework, to support arbitrary gear ratio (GR) and offset parameters through a…
At advanced process nodes, pattern matching techniques have been used in the detection of lithography hotspots, which can affect yields of manufactured integrated circuits. Although commercial pattern matching and in-design hotspot fixing…
Power Side-Channel (PSC) attacks exploit power consumption patterns to extract sensitive information, posing risks to cryptographic operations crucial for secure systems. Traditional countermeasures, such as masking, face challenges…
Many Security Operations Centers (SOCs) today still heavily rely on signature-based Network Intrusion Detection Systems (NIDS) such as Suricata. The specificity of intrusion detection rules and the coverage provided by rulesets are common…
Next generation cellular networks will consist of multiple tiers of cells and users associated with different network tiers may have different priorities (e.g., macrocell-picocell-femtocell networks with macro tier prioritized over pico…
Totally asynchronous code-division multiple-access (CDMA) systems are addressed. In Part I, the fundamental limits of asynchronous CDMA systems are analyzed in terms of spectral efficiency and SINR at the output of the optimum linear…
Phase-based statistical sampling methods such as SimPoints have proven to be effective at dramatically reducing the long time for architectural simulators to run large workloads such as SPEC CPU2017. However, generating and validating them…
For Application Specific Integrated Circuits (ASIC) and System-on-Chip (SOC) designs, Cell - Based Design (CBD) is the most prevalent practice as it guarantees a shorter design cycle, minimizes errors and is easier to maintain. In modern…
Quantum low-density parity-check codes reduce quantum error correction overhead but require dense, long-range connectivity that challenges hardware implementation, particularly for superconducting processors. We address this problem by…
We propose a set of benchmarks that specifically targets a major cause of performance degradation in high performance computing platforms: irregular access patterns. These benchmarks are meant to be used to asses the performance of…
In this paper, a new cooperation structure for spectrum sensing in cognitive radio networks is proposed which outperforms the existing commonly-used ones in terms of energy efficiency. The efficiency is achieved in the proposed design by…
To tackle the complexity of state-of-the-art electronic systems, silicon foundries continuously shrink the technology nodes and electronic design automation (EDA) vendors offer hierarchical design flows to decompose systems into smaller…