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Last-Level Cache (LLC) represents the bulk of a modern CPU processor's transistor budget and is essential for application performance as LLC enables fast access to data in contrast to much slower main memory. However, applications with…

Hardware Architecture · Computer Science 2020-06-16 Priyank Faldu

The compact size and high wavelength-selectivity of microring resonators (MRs) enable photonic networks-on-chip (PNoCs) to utilize dense-wavelength-division-multiplexing (DWDM) in their photonic waveguides, and as a result, attain high…

Hardware Architecture · Computer Science 2020-07-22 Sai Vineel Reddy Chittamuru , Ishan G Thakkar , Sudeep Pasricha , Sairam Sri Vatsavai , Varun Bhat

GPUs are increasingly being used in security applications, especially for accelerating encryption/decryption. While GPUs are an attractive platform in terms of performance, the security of these devices raises a number of concerns. One…

Cryptography and Security · Computer Science 2020-08-03 Elmira Karimi , Yunsi Fei , David Kaeli

We introduce a two-stage decimation process to improve the performance of neural belief propagation (NBP), recently introduced by Nachmani et al., for short low-density parity-check (LDPC) codes. In the first stage, we build a list by…

Information Theory · Computer Science 2020-11-05 Andreas Buchberger , Christian Häger , Henry D. Pfister , Laurent Schmalen , Alexandre Graell i Amat

The effects of soft errors in processor cores have been widely studied. However, little has been published about soft errors in uncore components, such as memory subsystem and I/O controllers, of a System-on-a-Chip (SoC). In this work, we…

Other Computer Science · Computer Science 2015-05-11 Hyungmin Cho , Chen-Yong Cher , Thomas Shepherd , Subhasish Mitra

The read channel of a Flash memory cell degrades after repetitive program and erase (P/E) operations. This degradation is often modeled as a function of the number of P/E cycles. In contrast, this paper models the degradation as a function…

Information Theory · Computer Science 2016-10-13 Haobo Wang , Nathan Wong , Tsung-Yi Chen , Richard D. Wesel

Modern commercial-off-the-shelf (COTS) multicore processors have advanced memory hierarchies that enhance memory-level parallelism (MLP), which is crucial for high performance. To support high MLP, shared last-level caches (LLCs) are…

Hardware Architecture · Computer Science 2025-07-23 Connor Sullivan , Alex Manley , Mohammad Alian , Heechul Yun

Many high end and next generation computing systems to incorporated alternative memory technologies to meet performance goals. Since these technologies present distinct advantages and tradeoffs compared to conventional DDR* SDRAM, such as…

Performance · Computer Science 2021-10-06 M. Ben Olson , Brandon Kammerdiener , Kshitij A. Doshi , Terry Jones , Michael R. Jantz

With the large-scale integration and use of neural network models, especially in critical embedded systems, their security assessment to guarantee their reliability is becoming an urgent need. More particularly, models deployed in embedded…

Cryptography and Security · Computer Science 2023-09-01 Clement Gaine , Pierre-Alain Moellic , Olivier Potin , Jean-Max Dutertre

Approximate computing (AC) leverages the inherent error resilience and is used in many big-data applications from various domains such as multimedia, computer vision, signal processing, and machine learning to improve systems performance…

Emerging Technologies · Computer Science 2022-05-24 Farah Ferdaus , B. M. S. Bahar Talukder , Md Tauhidur Rahman

Timing-based side and covert channels in processor caches continue to be a threat to modern computers. This work shows for the first time a systematic, large-scale analysis of Arm devices and the detailed results of attacks the processors…

Cryptography and Security · Computer Science 2021-11-02 Shuwen Deng , Nikolay Matyunin , Wenjie Xiong , Stefan Katzenbeisser , Jakub Szefer

As dynamic random access memory (DRAM) and other current transistor-based memories approach their scalability limits, the search for alternative storage methods becomes increasingly urgent. Phase-change memory (PCM) emerges as a promising…

Hardware Architecture · Computer Science 2025-11-10 Mahek Desai , Rowena Quinn , Marjan Asadinia

As Large Language Models (LLMs) scale in size and complexity, the consequences of failures during training become increasingly severe. A major challenge arises from Silent Data Corruption (SDC): hardware-induced faults that bypass…

Machine Learning · Computer Science 2026-04-02 Anton Altenbernd , Philipp Wiesner , Odej Kao

Data recovery has long been a focus of the electronics industry for decades by security experts, focusing on hard disk recovery, a type of non-volatile memory. Unfortunately, none of the existing research, neither from academia, industry,…

Cryptography and Security · Computer Science 2022-08-08 Joshua Hovanes , Yadi Zhong , Ujjwal Guin

In recent years, the energy consumption of computing systems has increased and a large fraction of this energy is consumed in main memory. Towards this, researchers have proposed use of non-volatile memory, such as phase change memory…

Hardware Architecture · Computer Science 2013-09-17 Sparsh Mittal

Hardware-level memory vulnerabilities severely threaten computing systems. However, hardware patching is inefficient or difficult postfabrication. We investigate the effectiveness of hardware fuzzing in detecting hardware memory…

Cryptography and Security · Computer Science 2024-10-31 Mohamadreza Rostami , Chen Chen , Rahul Kande , Huimin Li , Jeyavijayan Rajendran , Ahmad-Reza Sadeghi

The rapid deployment of deep neural network (DNN) accelerators in safety-critical domains such as autonomous vehicles, healthcare systems, and financial infrastructure necessitates robust mechanisms to safeguard data confidentiality and…

Cryptography and Security · Computer Science 2026-02-25 Wei Xuan , Zihao Xuan , Rongliang Fu , Ning Lin , Kwunhang Wong , Zikang Yuan , Lang Feng , Zhongrui Wang , Tsung-Yi Ho , Yuzhong Jiao , Luhong Liang

We investigate the problem of maintaining an encoded distributed storage system when some nodes contain adversarial errors. Using the error-correction capabilities that are built into the existing redundancy of the system, we propose a…

Cryptography and Security · Computer Science 2015-03-17 Theodoros K. Dikaliotis , Alexandros G. Dimakis , Tracey Ho

Parallel programming is emerging fast and intensive applications need more resources, so there is a huge demand for on-chip multiprocessors. Accessing L1 caches beside the cores are the fastest after registers but the size of private caches…

Performance · Computer Science 2016-09-27 Diman Zad Tootaghaj , Farshid Farhat

Intrinsic charge trap capacitive non-volatile flash memories take a significant share of the semiconductor electronics market today. It is a challenge to create intrinsic traps in the dielectric layer without high temperature processing…

Applied Physics · Physics 2019-06-19 Sandip Mondal , V Venkataraman