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HPC and Cloud have evolved independently, specializing their innovations into performance or productivity. Acceleration as a Service (XaaS) is a recipe to empower both fields with a shared execution platform that provides transparent access…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-01-10 Torsten Hoefler , Marcin Copik , Pete Beckman , Andrew Jones , Ian Foster , Manish Parashar , Daniel Reed , Matthias Troyer , Thomas Schulthess , Dan Ernst , Jack Dongarra

Transformers have revolutionized deep learning and generative modeling to enable unprecedented advancements in natural language processing tasks and beyond. However, designing hardware accelerators for executing transformer models is…

Hardware Architecture · Computer Science 2024-08-08 Pratyush Dhingra , Janardhan Rao Doppa , Partha Pratim Pande

FPGA-based hardware accelerators are becoming increasingly popular due to their versatility, customizability, energy efficiency, constant latency, and scalability. FPGAs can be tailored to specific algorithms, enabling efficient hardware…

Cryptography and Security · Computer Science 2024-05-24 Bharadwaj Madabhushi , Sandip Kundu , Daniel Holcomb

Transformer models rely heavily on the scaled dot-product attention (SDPA) operation, typically implemented as FlashAttention. Characterized by its frequent interleaving of matrix multiplications and softmax operations, FlashAttention fails…

Hardware Architecture · Computer Science 2025-12-09 Jiawei Lin , Yuanlong Li , Guokai Chen , Thomas Bourgeat

This paper introduces the first low-power hardware accelerator for Spiking Transformers, an emerging alternative to traditional artificial neural networks. By modifying the base Spikformer model to use IAND instead of residual addition, the…

Hardware Architecture · Computer Science 2025-03-26 Bo-Yu Chen , Tian-Sheuan Chang

Progress in computer use agents (CUAs) has been constrained by the absence of large and high-quality datasets that capture how humans interact with a computer. While LLMs have thrived on abundant textual data, no comparable corpus exists…

Efficient memory management in heterogeneous systems is increasingly challenging due to diverse compute architectures (e.g., CPU, GPU, FPGA) and dynamic task mappings not known at compile time. Existing approaches often require programmers…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-29 Serhan Gener , Aditya Ukarande , Shilpa Mysore Srinivasa Murthy , Sahil Hassan , Joshua Mack , Chaitali Chakrabarti , Umit Ogras , Ali Akoglu

Future servers will incorporate many active lowpower modes for different system components, such as cores and memory. Though these modes provide flexibility for power management via Dynamic Voltage and Frequency Scaling (DVFS), they must be…

Performance · Computer Science 2016-03-07 Yanpei Liu , Guilherme Cox , Qingyuan Deng , Stark C. Draper , Ricardo Bianchini

To deliver high performance in power limited systems, architects have turned to using heterogeneous systems, either CPU+GPU or mixed CPU-hardware systems. However, in systems with different processor types and task affinities, scheduling…

Performance · Computer Science 2017-12-12 Zhuo Chen , Diana Marculescu

Neuromorphic computing systems comprise networks of neurons that use asynchronous events for both computation and communication. This type of representation offers several advantages in terms of bandwidth and power consumption in…

Hardware Architecture · Computer Science 2017-11-07 Saber Moradi , Ning Qiao , Fabio Stefanini , Giacomo Indiveri

In recent years, heterogeneous computing has emerged as the vital way to increase computers? performance and energy efficiency by combining diverse hardware devices, such as Graphics Processing Units (GPUs) and Field Programmable Gate…

Programming Languages · Computer Science 2020-11-02 Michail Papadimitriou , Juan Fumero , Athanasios Stratikopoulos , Foivos S. Zakkak , Christos Kotselidis

Specialized image processing accelerators are necessary to deliver the performance and energy efficiency required by important applications in computer vision, computational photography, and augmented reality. But creating,…

Software Engineering · Computer Science 2016-11-01 Jing Pu , Steven Bell , Xuan Yang , Jeff Setter , Stephen Richardson , Jonathan Ragan-Kelley , Mark Horowitz

Next-generation mixed-criticality Systems-on-chip (SoCs) for robotics, automotive, and space must execute mixed-criticality AI-enhanced sensor processing and control workloads, ensuring reliable and time-predictable execution of critical…

Graph analytics are vital in fields such as social networks, biomedical research, and graph neural networks (GNNs). However, traditional CPUs and GPUs struggle with the memory bottlenecks caused by large graph datasets and their…

Hardware Architecture · Computer Science 2024-11-25 Oluwole Jaiyeoba , Abdullah T. Mughrabi , Morteza Baradaran , Beenish Gul , Kevin Skadron

Fully Homomorphic Encryption over the Torus (TFHE) allows arbitrary computations to happen directly on ciphertexts using homomorphic logic gates. However, each TFHE gate on state-of-the-art hardware platforms such as GPUs and FPGAs is…

Cryptography and Security · Computer Science 2022-02-18 Lei Jiang , Qian Lou , Nrushad Joshi

FPGAs are increasingly gaining traction in cloud and edge computing environments due to their hardware flexibility, low latency, and low energy consumption. However, the existing hardware stack of FPGA and the host-FPGA connectivity does…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-03-04 Masudul Hassan Quraishi , Michael Riera , Fengbo Ren , Aman Arora , Aviral Shrivastava

Transformer-based models dominate modern AI workloads but exacerbate memory bottlenecks due to their quadratic attention complexity and ever-growing model sizes. Existing accelerators, such as Groq and Cerebras, mitigate off-chip traffic…

Hardware Architecture · Computer Science 2026-02-12 Jinxin Yu , Yudong Pan , Mengdi Wang , Huawei Li , Yinhe Han , Xiaowei Li , Ying Wang

Data center hardware refresh cycles are lengthening. However, increasing processor complexity is raising the potential for faults. To achieve longevity in the face of increasingly fault-prone datapaths, fault tolerance is needed, especially…

Hardware Architecture · Computer Science 2025-07-01 Guy Wilks , Brian Li , Jonathan Balkind

In cost-sensitive deployments, RAID arrays may combine SSDs with different performance levels. Such heterogeneity arises when aging SSDs degrade yet remain usable, or when failed drives are replaced with new devices of explicitly better…

Operating Systems · Computer Science 2026-04-03 Jialin Liu , Liang Shi , Dingcui Yu

High Performance Computing (HPC) platforms allow scientists to model computationally intensive algorithms. HPC clusters increasingly use General-Purpose Graphics Processing Units (GPGPUs) as accelerators; FPGAs provide an attractive…

Hardware Architecture · Computer Science 2015-04-20 Syed Waqar Nabi , Saji N. Hameed , Wim Vanderbauwhede
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