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Accurate simulation techniques are indispensable to efficiently propose new memory or architectural organizations. As implementing new hardware concepts in real systems is often not feasible, cycle-accurate simulators employed together with…

Hardware Architecture · Computer Science 2024-02-02 Nicolas Bueno , Fernando Castro , Luis Pinuel , Jose Ignacio Gomez-Perez , Francky Catthoor

Emerging computing applications such as Artificial Intelligence (AI) are facing a memory wall with existing on-package memory solutions that are unable to meet the power-efficient bandwidth demands. We propose to enhance UCIe with memory…

Hardware Architecture · Computer Science 2025-10-09 Debendra Das Sharma , Swadesh Choudhary , Peter Onufryk , Rob Pelt

High density Solid State Drives, such as QLC drives, offer increased storage capacity, but a magnitude lower Program and Erase (P/E) cycles, limiting their endurance and hence usability. We present the design and implementation of…

Hardware Architecture · Computer Science 2022-08-02 Shehbaz Jaffer , Kaveh Mahdaviani , Bianca Schroeder

Directory-based protocols have been the de facto solution for maintaining cache coherence in shared-memory parallel systems comprising multi/many cores, where each store instruction is eagerly made globally visible by invalidating the…

Hardware Architecture · Computer Science 2012-10-09 Daofu Liu , Yunji Chen , Qi Guo , Tianshi Chen , Ling Li , Qunfeng Dong , Weiwu Hu

Multi-core processors improve performance, but they can create unpredictability owing to shared resources such as caches interfering. Cache partitioning is used to alleviate the Worst-Case Execution Time (WCET) estimation by isolating the…

Hardware Architecture · Computer Science 2022-01-28 Soma N. Ghosh , Vineet Sahula , Lava Bhargava

Input/Output (I/O) performance is one of the key areas that need to be carefully examined to better support IT services. With the rapid development and deployment of virtualization technology, many essential business applications have been…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-02-18 T. Mirzoev , B. Yang , M. Davis , T. Williams

The number of battery-powered devices is rapidly increasing due to the widespread use of IoT-enabled nodes in various fields. Energy harvesters, which help to power embedded devices, are a feasible alternative to replacing battery-powered…

Hardware Architecture · Computer Science 2023-05-18 SatyaJaswanth Badri , Mukesh Saini , Neeraj Goel

This letter investigates a cache-enabled multiuser mobile edge computing (MEC) system with dynamic task arrivals, taking into account the impact of proactive cache placement on the system's overall energy consumption. We consider that an…

Information Theory · Computer Science 2023-02-01 Jingxuan Liang , Hong Xing , Feng Wang , Vincent K. N. Lau

In this paper, we jointly consider communication, caching and computation in a multi-user cache-assisted mobile edge computing (MEC) system, consisting of one base station (BS) of caching and computing capabilities and multiple users with…

Information Theory · Computer Science 2017-08-17 Ying Cui , Wen He , Chun Ni , Chengjun Guo , Zhi Liu

Devices with the ability to connect to the internet are growing in numbers day by day thus creating the need for a new way of manag-ing the way the produced traffic travels through data networks. Smart Cities, Vehicular Content Networks,…

In this paper, we present a novel content caching and delivery approach for mobile virtual reality (VR) video streaming. The proposed approach aims to maximize VR video streaming performance, i.e., minimizing video frame missing rate, by…

Signal Processing · Electrical Eng. & Systems 2023-11-20 Mushu Li , Jie Gao , Conghao Zhou , Xuemin Shen , Weihua Zhuang

By suppressing repeated content deliveries, wireless caching has the potential to substantially improve the energy efficiency (EE) of the fifth generation (5G) communication networks. In this paper, we propose two novel energy-efficient…

Signal Processing · Electrical Eng. & Systems 2018-05-31 Xuewei Zhang , Tiejun Lv , Wei Ni , John M. Cioffi , Norman C. Beaulieu , Y. Jay Guo

In most modern systems, the memory subsystem is managed and accessed at multiple different granularities at various resources. We observe that such multi-granularity management results in significant inefficiency in the memory subsystem.…

Hardware Architecture · Computer Science 2016-05-23 Vivek Seshadri

In this thesis, we describe a new, practical approach to integrating hardware-based data compression within the memory hierarchy, including on-chip caches, main memory, and both on-chip and off-chip interconnects. This new approach is fast,…

Hardware Architecture · Computer Science 2016-09-08 Gennady Pekhimenko

We study the optimal design of heterogeneous Coded Elastic Computing (CEC) where machines have varying computation speeds and storage. CEC introduced by Yang et al. in 2018 is a framework that mitigates the impact of elastic events, where…

Information Theory · Computer Science 2020-08-13 Nicholas Woolsey , Rong-Rong Chen , Mingyue Ji

Emerging applications, such as big data analytics and machine learning, require increasingly large amounts of main memory, often exceeding the capacity of current commodity processors built on DRAM technology. To address this, recent…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-10-27 Manel Lurbe , Miguel Avargues , Salvador Petit , Maria E. Gomez , Rui Yang , Guanhao Wang , Julio Sahuquillo

As more IoT applications gradually move towards the cloud-edge collaborative mode, the containerized scheduling of workflows extends from the cloud to the edge. However, given the high delay of the communication network, loose coupling of…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-01-03 Chenggang Shan , Runze Gao , Qinghua Han , Zhen Yang , Jinhui Zhang , Yuanqing Xia

Edge Computing is a new distributed Cloud Computing paradigm in which computing and storage capabilities are pushed to the topological edge of a network. However, various standards and implementations are promoted by different initiatives.…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-01-13 Andrea Hamm , Alexander Willner , Ina Schieferdecker

Unlike other accelerators, FPGAs are capable of supporting cache coherency, thereby turning them into a more powerful architectural option than just a peripheral accelerator. However, most existing deployments of FPGAs are either non-cache…

Hardware Architecture · Computer Science 2022-08-16 Abishek Ramdas , Michael Giardino , Runbin Shi , Adam Turowski , David Cock , Gustavo Alonso , Timothy Roscoe

The widening gap between processor speed and storage latency has made data movement a dominant bottleneck in modern systems. Two lines of storage-layer innovation attempted to close this gap: persistent memory shortened the latency…

Operating Systems · Computer Science 2026-04-06 Yiwei Yang , Yanpeng Hu , Yusheng Zheng , Estabon Ramos , Jianchang Su , Andi Quinn , Wei Zhang
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