Related papers: A 1 GHz RF Trigger Unit implemented in FPGA logic
Experimental particle physics demands a sophisticated trigger and acquisition system capable to efficiently retain the collisions of interest for further investigation. Heterogeneous computing with the employment of FPGA cards may emerge as…
Embedded Field-Programmable Gate Arrays (eFPGAs) allow for the design of hardware accelerators of edge Machine Learning (ML) applications at a lower power budget compared with traditional FPGA platforms. However, the limited eFPGA logic and…
This paper presents an architecture of high-resolution delay generator implemented in a single field programmable gate array (FPGA) chip by exploiting the method of utilizing dedicated carry chains. It serves as the core component in…
In order to meet the requirement of high data rates for the next generation wireless systems, the efficient implementation of receiver algorithms is essential. On the other hand, the rapid development of technology motivates the…
The implementation of convolutional neural networks in programmable logic, for applications in fast online event selection at hadron colliders is studied. In particular, an approach based on full event images for classification is studied,…
A configurable trigger scaler and delay NIM module has been designed to equip nuclear physics experiments and lab teaching classes. It is configurable through a Graphical User Interface (GUI) and provides a large number of possible trigger…
Validating FPGA firmware logic used in particle physics is becoming increasingly difficult as the implementation logic scales and becomes more complex with the expansion of FPGA resources. In order to address this issue efficiently, we have…
An FPGA-based online trigger system has been developed for the COMET Phase-I experiment. This experiment searches for muon-to-electron conversion, which has never been observed yet. A drift chamber and trigger counters detect a…
This paper reports on the development of a resource-efficient FPGA-based neural network regression model for potential applications in the future hardware muon trigger system of the ATLAS experiment at the Large Hadron Collider (LHC).…
This study presents advanced neural network architectures including Convolutional Neural Networks (CNN), Recurrent Neural Networks (RNN), Long Short-Term Memory Networks (LSTMs), and Deep Belief Networks (DBNs) for enhanced ECG signal…
Deep neural network (DNN) inference relies increasingly on specialized hardware for high computational efficiency. This work introduces a field-programmable gate array (FPGA)-based dynamically configurable accelerator featuring systolic…
This research delves into sophisticated neural network frameworks like Convolutional Neural Networks (CNN), Recurrent Neural Networks (RNN), Long Short-Term Memory Networks (LSTMs), and Deep Belief Networks (DBNs) for improved analysis of…
Graphics Processing Unit, or GPUs, have been successfully adopted both for graphic computation in 3D applications, and for general purpose application (GP-GPUs), thank to their tremendous performance-per-watt. Recently, there is a big…
This article describes the implementation of a mean-timer and coincidence logic on a Virtex-5 FPGA for trigger purposes in a particle physics experiment. The novel feature is that the mean-timing and the coincidence logic are not…
Various hardware accelerators have been developed for energy-efficient and real-time inference of neural networks on edge devices. However, most training is done on high-performance GPUs or servers, and the huge memory and computing costs…
The increasing complexity and scale of Deep Neural Networks (DNNs) necessitate specialized tensor accelerators, such as Tensor Processing Units (TPUs), to meet various computational and energy efficiency requirements. Nevertheless,…
Field-programmable gate arrays (FPGAs) are becoming widely used accelerators for a myriad of datacenter applications due to their flexibility and energy efficiency. Among these applications, FPGAs have shown promising results in…
In this paper we show how a deep-submicron FPGA can be modified to operate at extremely low temperatures through modifications in the supporting hardware and in the firmware programming it. Though FPGAs are not designed to operate at a few…
A multi-layer trigger system, based on programmable logic devices hosted on VME boards, has been implemented. It is completely scalable and suitable for handling from a few up to a few hundred channels. Custom software for monitoring and…
We present the first sub-microsecond transformer implementation on an FPGA achieving competitive performance for state-of-the-art high-energy physics benchmarks. Transformers have shown exceptional performance on multiple tasks in modern…