Related papers: Fast Statistical Timing Analysis for Circuits with…
The quickest change detection problem is considered in the context of monitoring large-scale independent normal distributed data streams with possible changes in some of the means. It is assumed that for each individual local data stream,…
We present an elastic buffer design that enables all-digital clock recovery implementation with free-running receiver clock featuring negative and positive clock frequency offsets. Error-free real-time data transmission is demonstrated from…
In this paper, we investigate the performance analysis and synthesis of distributed system throttlers (DST). A throttler is a mechanism that limits the flow rate of incoming metrics, e.g., byte per second, network bandwidth usage, capacity,…
As an old and widely used tool, it is still possible to find new insights and applications from Fast Fourier Transform (FFT)-based analyses. The FFT is frequently used to generate the Power Spectral Density (PSD) function, by squaring the…
Wall-clock convergence time and communication rounds are critical performance metrics in distributed learning with parameter-server setting. While synchronous methods converge fast but are not robust to stragglers; and asynchronous ones can…
The resistance state of filamentary memristors can be tuned by relocating only a few atoms at interatomic distances in the active region of a conducting filament. Thereby the technology holds promise not only in its ultimate downscaling…
Time series prediction is crucial for understanding and forecasting complex dynamics in various domains, ranging from finance and economics to climate and healthcare. Based on Transformer architecture, one approach involves encoding…
Network performance problems are notoriously difficult to diagnose. Prior profiling systems collect performance statistics by keeping information about each network flow, but maintaining per-flow state is not scalable on…
The exponential emergence of Field Programmable Gate Array (FPGA) has accelerated the research of hardware implementation of Deep Neural Network (DNN). Among all DNN processors, domain specific architectures, such as, Google's Tensor…
This thesis develops signal-processing algorithms and implementation schemes under constraints of minimal parallelism and memory space, with the goal of improving energy efficiency of low-power computing hardware. We propose (i) a…
The miniaturization of transistors down to 5nm and beyond, plus the increasing complexity of integrated circuits, significantly aggravate short channel effects, and demand analysis and optimization of more design corners and modes.…
Measuring time means counting the occurrence of periodic phenomena. Over the past centuries a major effort was put to make stable and precise oscillators to be used as clock regulators. Here we consider a different class of clocks based on…
In fast ramping synchrotrons like the Fermilab Booster the conventional methods of betatron tune evaluation from the turn-by-turn data may not work due to rapid changes of the tunes (sometimes in a course of a few dozens of turns) and a…
This paper focuses on efficient steady-state computations of induction machines. In particular, the periodic Parareal algorithm with initial-value coarse problem (PP-IC) is considered for acceleration of classical time-stepping simulations…
Porting code from CPU to GPU is costly and time-consuming; Unless much time is invested in development and optimization, it is not obvious, a priori, how much speed-up is achievable or how much room is left for improvement. Knowing the…
This paper describes a new approach to experimentally estimate the application schedulability for various processor frequencies. We use additional workload generated by an artificial high priority routine to simulate the frequency decrease…
We present two novel optimizations that accelerate clock-based spiking neural network (SNN) simulators. The first one targets spike timing dependent plasticity (STDP). It combines lazy- with event-driven plasticity and efficiently…
The operation of critical infrastructures such as the electrical power grid, cellphone towers, and financial institutions relies on precise timing provided by stationary GPS receivers. These GPS devices are vulnerable to a type of spoofing…
Reasoned by its dynamical behavior, the memristor enables a lot of new applications in analog circuit design. Since some realizations are shown (e.g. 2007 by Hewlett Packard), the development of applications with memristors becomes more and…
Probabilistic breadth-first traversals (BPTs) are used in many network science and graph machine learning applications. In this paper, we are motivated by the application of BPTs in stochastic diffusion-based graph problems such as…