Related papers: Work-sharing of qubits in topological error correc…
Current quantum devices typically lack full qubit connectivity, making it difficult to directly execute logical circuits on quantum devices. This limitation necessitates quantum circuit mapping algorithms to insert SWAP gates, dynamically…
We present a quantum SWAP gate valid for quantum systems of an arbitrary dimension. The gate generalizes the CNOT implementation of the SWAP gate for qubits and keeps its most important properties, like symmetry and simplicity. We only use…
Quantum circuits are typically represented by a (ordered) sequence of gates over a set of virtual qubits. During compilation, the virtual qubits of the gates are assigned to the physical qubits of the underlying quantum hardware, a step…
A new Boolean-Phase swapping gate is presented with improved quantum generality and cost-effectiveness. Our swapping gate is termed the "p-SWAP gate", where p is the phase difference selected for a set of swapped qubits. The phase p is…
Fault-tolerant quantum error correction is essential for implementing quantum algorithms of significant practical importance. In this work, we propose a highly effective use of the surface-GKP code, i.e., the surface code consisting of…
Circuit knitting emerges as a promising technique to overcome the limitation of the few physical qubits in near-term quantum hardware by cutting large quantum circuits into smaller subcircuits. Recent research in this area has been…
In circuit-based quantum computing, the available gate set typically consists of single-qubit gates acting on each individual qubit and at least one entangling gate between pairs of qubits. In certain physical architectures, however, some…
Scaling up quantum computing hardware is hindered by the narrow operating margins of current quantum components. Here, we introduce a composite qubit and gate scheme that achieves wide margins by use of transistor-like nonlinearities to…
Using the Parity Flow formalism, we show that physical SWAP gates can be eliminated in linear hardware architectures, without increasing the total number of two-qubit operations. This has a significant impact on the execution time of…
We propose a scalable trapped-ion quantum-computing architecture that efficiently incorporates quantum error correction. The chip design exploits orthogonal qubit connectivity by assigning horizontal trap regions to transversal logical…
We describe in detail how to perform universal fault-tolerant quantum computation on a 2-D color code, making use of only nearest neighbor interactions. Three defects (holes) in the code are used to represent logical qubits. Triple defect…
"Qubit routing" refers to the task of modifying quantum circuits so that they satisfy the connectivity constraints of a target quantum computer. This involves inserting SWAP gates into the circuit so that the logical gates only ever occur…
Entangling gates between qubits are a crucial component for performing algorithms in quantum computers. However, any quantum algorithm must ultimately operate on error-protected logical qubits encoded in high-dimensional systems. Typically,…
The fragile nature of quantum information limits our ability to construct large quantities of quantum bits suitable for quantum computing. An important goal, therefore, is to minimize the amount of resources required to implement quantum…
Designing efficient quantum processor topologies is pivotal for advancing scalable quantum computing architectures. The communication overhead, a critical factor affecting the execution fidelity of quantum circuits, arises from inevitable…
In recent years, surface codes have become a leading method for quantum error correction in theoretical large scale computational and communications architecture designs. Their comparatively high fault-tolerant thresholds and their natural…
Quantum low-density parity-check codes are promising candidates towards scalable fault-tolerant quantum computation. Among these, bivariate bicycle (BB) codes offer superior encoding rates and large code distance compared to surface codes.…
We present a scalable architecture for fault-tolerant topological quantum computation using networks of voltage-controlled Majorana Cooper pair boxes, and topological color codes for error correction. Color codes have a set of transversal…
Quantum low-density parity-check (qLDPC) codes are a promising construction for drastically reducing the overhead of fault-tolerant quantum computing (FTQC) architectures. However, all of the known hardware implementations of these codes…
We show a significant reduction of the number of quantum operations and the improvement of the circuit depth for the realization of the Toffoli gate by using qudits. This is done by establishing a general relation between the dimensionality…