Related papers: Implementing High-Order FIR Filters in FPGAs
The analog signals generated in the read-out electronics of radiation detectors are shaped prior to the digitization in order to improve the signal to noise ratio (SNR). The real amplitude of the analog signal is then obtained using digital…
This research work focuses on the design of a high-resolution fast Fourier transform (FFT) /inverse fast Fourier transform (IFFT) processors for constraints analysis purpose. Amongst the major setbacks associated with such high resolution,…
AI acceleration has been dominated by GPUs, but the growing need for lower latency, energy efficiency, and fine-grained hardware control exposes the limits of fixed architectures. In this context, Field-Programmable Gate Arrays (FPGAs)…
A simple procedure for the design of recursive digital filters with an infinite impulse response (IIR) and non-recursive digital filters with a finite impulse response (FIR) is described. The fixed-lag smoothing filters are designed to…
Pulsar search is one of the main tasks for the Square Kilometre Array (SKA), implemented in the central signal processor (CSP) sub-element. As most the characteristics of undiscovered pulsars are unknown by definition, exhaustive searches…
This letter considers the design of linear-phase finite-length impulse response (FIR) filters for equalization of the frequency responses of digital-to-analog converters (DACs). The letter derives estimates for the filter orders required,…
In engineering applications sorting is an important and widely studied problem where execution speed and resources used for computation are of extreme importance, especially if we think about real time data processing. Most of the…
A finite impulse response (FIR) filter is a ubiquitous block in digital signal processing applications. Its characteristics are determined by its coefficients, which are the intellectual property (IP) for its designer. However, in a…
Electronic systems for qubit control and measurement serve as a bridge between quantum programming language and quantum information processors. With the rapid development of superconducting quantum circuit (SQC) technology, synchronization…
Fast Fourier transform (FFT) of large number of samples requires huge hardware resources of field programmable gate arrays (FPGA), which needs more area and power. In this paper, we present an area efficient architecture of FFT processor…
Finite impulse response (FIR) graph filters play a crucial role in the field of signal processing on graphs. However, when the graph signal is time-varying, the state of the art FIR graph filters do not capture the time variations of the…
Digital filters with variable bandwidth can be used for a variety of applications. Arbitrary change in the bandwidth of a digital Finite Impulse Response (FIR) filter can be acquired using sampling rate converters. In this paper, a sampling…
Embedded system performances are bounded by power consumption. The trend is to offload greedy computations on hardware accelerators as GPU, Xeon Phi or FPGA. FPGA chips combine both flexibility of programmable chips and energy-efficiency of…
In this paper, the field programmable gate array (FPGA) implementation of a fetal heart rate (FHR) monitoring system is presented. The system comprises of a preprocessing unit to remove various types of noise, followed by a fetal…
The Square Kilometre Array (SKA) project will be the world largest radio telescope array. With its large number of antennas, the number of signals that need to be processed is dramatic. One important element of the SKA's Central Signal…
In this paper, we propose an architecture for FPGA emulation of mixed-signal systems that achieves high accuracy at a high throughput. We represent the analog output of a block as a superposition of step responses to changes in its analog…
FIR (finite impulse response) digital filter design is a fundamental problem in signal processing. In particular, FIR approximation of analog filters (or systems) is ubiquitous not only in signal processing but also in digital…
This study presents an efficient field-programmable gate array (FPGA) implementation of a polynomial spline function-based statistical compression algorithm designed to address the critical challenge of massive data transfer bandwidth in…
We report on experimental demonstration of a mixed-signal 6-tap finite-impulse response (FIR) filter in which weights are implemented with titanium dioxide memristive devices. In the proposed design weight of a tap is stored with a…
Reconfigurable architectures like Field Programmable Gate Arrays (FPGAs) have been used for accelerating computations in several domains because of their unique combination of flexibility, performance, and power efficiency. However, FPGAs…