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Related papers: DETOx: Towards Optimal Software-based Soft-Error D…

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Future extreme-scale computer systems may expose silent data corruption (SDC) to applications, in order to save energy or increase performance. However, resilience research struggles to come up with useful abstract programming models for…

Mathematical Software · Computer Science 2014-01-15 James Elliott , Mark Hoemmen , Frank Mueller

High-performance and safety-critical system architects must accurately evaluate the application-level silent data corruption (SDC) rates of processors to soft errors. Such an evaluation requires error propagation all the way from particle…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-05-05 Siva Kumar Sastry Hari , Paolo Rech , Timothy Tsai , Mark Stephenson , Arslan Zulfiqar , Michael Sullivan , Philip Shirvani , Paul Racunas , Joel Emer , Stephen W. Keckler

Assertions are widely used for functional validation as well as coverage analysis for both software and hardware designs. Assertions enable runtime error detection as well as faster localization of errors. While there is a vast literature…

Systems and Control · Electrical Eng. & Systems 2020-01-22 Yangdi Lyu , Prabhat Mishra

Even competent programmers make mistakes. Automatic verification can detect errors, but leaves the frustrating task of finding the erroneous line of code to the user. This paper presents an automatic approach for identifying potential error…

Logic in Computer Science · Computer Science 2014-09-17 Robert Koenighofer , Ronald Toegl , Roderick Bloem

Too many defective compute chips are escaping existing manufacturing tests -- at least an order of magnitude more than industrial targets across all compute chip types in data centers. Silent data corruptions (SDCs) caused by test escapes,…

Silent Data Corruption (SDC) can have negative impact on large-scale infrastructure services. SDCs are not captured by error reporting mechanisms within a Central Processing Unit (CPU) and hence are not traceable at the hardware level.…

Hardware Architecture · Computer Science 2021-02-23 Harish Dattatraya Dixit , Sneha Pendharkar , Matt Beadon , Chris Mason , Tejasvi Chakravarthy , Bharath Muthiah , Sriram Sankar

Silent Errors within hardware devices occur when an internal defect manifests in a part of the circuit which does not have check logic to detect the incorrect circuit operation. The results of such a defect can range from flipping a single…

Hardware Architecture · Computer Science 2022-03-18 Harish Dattatraya Dixit , Laura Boyle , Gautham Vunnam , Sneha Pendharkar , Matt Beadon , Sriram Sankar

Automated test generators, such as search based software testing (SBST) techniques, replace the tedious and expensive task of manually writing test cases. SBST techniques are effective at generating tests with high code coverage. However,…

Software Engineering · Computer Science 2022-06-15 Anjana Perera

This paper introduces DDMIN-LOC, a technique that combines Delta Debugging Minimization (DDMIN) with Spectrum-Based Fault Localization (SBFL). It can be applied to programs taking string inputs, even when only a single failure-inducing…

Software Engineering · Computer Science 2026-01-09 Charaka Geethal Kapugama

Hyperscaler reports of silent data corruptions (SDCs), presumed to be caused by silicon manufacturing defects, have motivated the development of functional tests for detecting defective CPUs. We present ITHICA, an approach for automatically…

Hardware Architecture · Computer Science 2026-05-18 Ioanna Vavelidou , Subho S. Banerjee , Eric X. Liu , Mike Fuller , Subhasish Mitra , Caroline Trippel

As supercomputers grow in hardware complexity, their susceptibility to faults increases and measures need to be taken to ensure the correctness of results. Some numerical algorithms have certain characteristics that allow them to recover…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-16 Thomas Saupe , Sebastian Götschel , Thibaut Lunet , Daniel Ruprecht , Robert Speck

The increase in HPC systems size and complexity, together with increasing on-chip transistor density, power limitations, and number of components, render modern HPC systems subject to soft errors. Silent data corruptions (SDCs) are…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-09-04 Aurélien Cavelan , Florina M. Ciorba

In hardware accelerators used in data centers and safety-critical applications, soft errors and resultant silent data corruption significantly compromise reliability, particularly when upsets occur in control-flow operations, leading to…

Hardware Architecture · Computer Science 2025-05-09 Tomonari Tanaka , Takumi Uezono , Kohei Suenaga , Masanori Hashimoto

Failure detection protocols---a fundamental building block for crafting fault-tolerant distributed systems---are in many cases described by their authors making use of informal pseudo-codes of their conception. Often these pseudo-codes use…

Distributed, Parallel, and Cluster Computing · Computer Science 2015-04-15 Vincenzo De Florio , Chris Blondia

Handling faults is a growing concern in HPC. In future exascale systems, it is projected that silent undetected errors will occur several times a day, increasing the occurrence of corrupted results. In this article, we propose SEDAR, which…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-07-29 Diego Montezanti , Enzo Rucci , Armando De Giusti , Marcelo Naiouf , Dolores Rexachs , Emilio Luque

Writing good software tests can be challenging, therefore approaches that support developers are desirable. While generating complete tests automatically is such an approach commonly proposed in research, developers may already have…

Software Engineering · Computer Science 2025-04-30 Severin Primbs , Benedikt Fein , Gordon Fraser

The complexity of software in embedded systems has increased significantly over the last years so that software verification now plays an important role in ensuring the overall product quality. In this context, SAT-based bounded model…

Software Engineering · Computer Science 2009-11-20 Lucas Cordeiro , Bernd Fischer , Joao Marques-Silva

Estimating the Worst-Case Execution Time (WCET) of an application is an essential task in the context of developing real-time or safety-critical software, but it is also a complex and error-prone process. Conventional approaches require at…

Software Engineering · Computer Science 2018-06-13 Martin Becker , Ravindra Metta , R Venkatesh , Samarjt Chakraborty

In semantic segmentation, even state-of-the-art deep learning models fall short of the performance required in certain high-stakes applications such as medical image analysis. In these cases, performance can be improved by allowing a model…

Machine Learning · Computer Science 2026-05-26 Bruno Laboissiere Camargos Borges , Bruno Machado Pacheco , Danilo Silva

Nowadays, locating software components responsible for observed failures is one of the most expensive and error-prone tasks in the software development process. To improve the debugging process efficiency, some effort was already made to…

Software Engineering · Computer Science 2013-06-20 Alexandre Perez
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