Related papers: Saving Moore's Law Down To 1nm Channels With Aniso…
We have performed numerical modeling of dual-gate ballistic n-MOSFET's with channel length of the order of 10 nm, including the effects of quantum tunneling along the channel and through the gate oxide. Our analysis includes a…
The main promise of tunnel FETs (TFETs) is to enable supply voltage ($V_{DD}$) scaling in conjunction with dimension scaling of transistors to reduce power consumption. However, reducing $V_{DD}$ and channel length ($L_{ch}$) typically…
As metal-oxide-semiconductor field-effect transistors (MOSFET) channel lengths (Lg) are scaled to lengths shorter than Lg<8 nm source-drain tunneling starts to become a major performance limiting factor. In this scenario a heavier transport…
Traditional transistors based on complementary metal-oxide-semiconductor (CMOS) and metal-oxide-semiconductor field-effect transistors (MOSFETs) are facing significant limitations as device scaling reaches the limits of Moore's Law. These…
As silicon transistors scale toward future technology nodes, three-dimensional architectures -- including gate-all-around (GAA) nanoribbon and complementary field-effect transistors (CFETs) -- require channel widths in the tens of…
Low-dimensional materials such as layered semiconductors or carbon nanotubes (CNTs) have been attracting increasing attention in the last decades due to their inherent scaling properties, which become fundamental to sustain the scaling in…
We study the channel width scaling of back-gated MoS2 metal-oxide-semiconductor field-effect transistors (MOSFETs) from 2 {\mu}m down to 60 nm. We reveal that the channel conductance scales linearly with channel width, indicating no evident…
The work estimates the minimum channel length of the MOSFET transistor, which is the bacis device of modern electronics. Taking into account the real shape of potential barrier in the channel shows that the electron tunnels through a region…
Nanoscale transistors require aggressive reduction of all channel dimensions: length, width, and thickness. While monolayer two-dimensional semiconductors (2DS) offer ultimate thickness scaling, good performance has largely been achieved…
An unresolved challenge facing electronics at a few-nm scale is that resistive channels start leaking due to quantum tunneling. This affects the performance of nanoscale transistors, with single-molecule devices displaying particularly low…
We performed a comprehensive scaling study of Schottky barrier carbon nanotube transistors using self-consistent, atomistic scale simulations. We restrict our attention to Schottky barrier carbon nanotube FETs whose metal source/drain is…
We have used a simple, analytically solvable model to analyze the characteristic s of dual-gate metal-oxide-semiconductor field-effect transistors (MOSFETs) with 10-nm-scale channel length L. The model assumes ballistic dynamics of 2D…
In order to continue to improve integrated circuit performance and functionality, scaled transistors with short channel lengths and low thickness are needed. But the further scaling of silicon-based devices and the development of…
Two-dimensional (2D) materials have great potential for use in future electronics due to their atomically thin nature which withstands short channel effects and thus enables better scalability. Device scaling is the process of reducing all…
In this article, we investigate electrical transport properties in ultrathin body (UTB) MoS2 two-dimensional (2D) crystals with channel lengths ranging from 2 {\mu}m down to 50 nm. We compare the short channel behavior of sets of MOSFETs…
While decreasing the oxide thickness in carbon nanotube field-effect transistors (CNFETs) improves the turn-on behavior, we demonstrate that this also requires scaling the range of the drain voltage. This scaling is needed to avoid an…
A general solution for the electrostatic potential in an atomic-thin-body (ATB) field-effect transistor geometry is presented. The effective electrostatic scaling length, {\lambda}eff, is extracted from the analytical model, which cannot be…
In our previous papers on ballistic quantum transport in nano-transistors [J. Appl. Phys. 98, 84308 (2005)] it was demonstrated that under certain conditions it is possible to reduce the three-dimensional transport problem to an effectively…
We propose a theoretical model for describing the operation of a transistor with a MoS2 monolayer channel, which allows to obtain an analytical approximation of the potential in the channel. This potential depends on the drain and gate…
The doped silicon regions (tubs) in PWFDSOI MOSFET cause significant reduction in OFF current by reducing the number of carriers contributing to the OFF current. The emphasis of the simulation and device physics study on PWFDSOI MOSFET…