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Deep Neural Networks (DNNs) are widely employed in safety-critical domains, where ensuring their reliability is essential. Triple Modular Redundancy (TMR) is an effective technique to enhance the reliability of DNNs in the presence of…

Machine Learning · Computer Science 2025-07-15 Kimia Soroush , Nastaran Shirazi , Mohsen Raji

There are many distributed systems which use a leader in their logic. When such systems need to be fault tolerant and the current leader suffers a technical problem, it is necesary to apply a special algorithm in order to choose a new…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-03-08 Marius Rafailescu

Fault tolerance in Deep Neural Networks (DNNs) deployed on resource-constrained systems presents unique challenges for high-accuracy applications with strict timing requirements. Memory bit-flips can severely degrade DNN accuracy, while…

Effects of radiation on electronic circuits used in extra-terrestrial applications and radiation prone environments need to be corrected. Since FPGAs offer flexibility, the effects of radiation on them need to be studied and robust methods…

Hardware Architecture · Computer Science 2013-11-06 Aditya Srinivas Timmaraju , Aniket Anand Deshmukh , Mohammed Amir Khan , Zafar Ali Khan

As more the communications and signal process we use in the today life the more we intend to develop more reliable devices which gives fewer errors due to transient fault, So we use a technique called 5-modular redundancy to generate fewer…

Signal Processing · Electrical Eng. & Systems 2023-04-18 Sathvik Reddy O , Sakthivel SM

We describe the voting farm, a tool which implements a distributed software voting mechanism for a number of parallel message passing systems. The tool, developed in the framework of EFTOS (Embedded Fault-Tolerant Supercomputing), can be…

Distributed, Parallel, and Cluster Computing · Computer Science 2014-01-14 Vincenzo De Florio , G. Deconinck , Rudy Lauwereins

This paper presents a high-throughput fault-resilient hardware implementation of AES S-box, called HFS-box. If a transient natural or even malicious fault in each pipeline stage is detected, the corresponding error signal becomes high and…

Hardware Architecture · Computer Science 2020-09-14 Mahdi Taheri , Saeideh Sheikhpour , Mohammad Saeed Ansari , Ali Mahani

Security requirements for the Internet of things (IoT), wireless sensor nodes, and other wireless devices connected in a network for data exchange are high. These devices are often subject to lab analysis with the objective to reveal secret…

Hardware Architecture · Computer Science 2024-07-10 Dmytro Petryk , Zoya Dyka , Ievgen Kabin , Anselm Breitenreiter , Jan Schaeffner , Milos Krstic

The traditional approach to fault tolerant computing involves replicating computation units and applying a majority vote operation on individual result bits. This approach, however, has several limitations; the most severe is the resource…

Hardware Architecture · Computer Science 2011-04-19 Shlomi Dolev , Sergey Frenkel , Dan Tamir

As safety-critical applications increasingly rely on data-parallel floating-point computations, there is an increasing need for flexible and configurable fault tolerance in parallel floating-point accelerators such as tensor engines. While…

Hardware Architecture · Computer Science 2025-04-22 Philip Wiese , Maurus Item , Luca Bertaccini , Yvan Tortorella , Angelo Garofalo , Luca Benini

Fault tolerance in multi-core architecture has attracted attention of research community for the past 20 years. Rapid improvements in the CMOS technology resulted in exponential growth of transistor density. It resulted in increased…

Hardware Architecture · Computer Science 2022-01-03 Shashikiran Venkatesha , Ranjani Parthasarathi

Reliability has taken centre stage in the development of high-performance computing processors. A Surge of interest is noticeable in recent times in formulating fault and failure models, understanding failure mechanism and strategizing…

Hardware Architecture · Computer Science 2022-03-16 Shashikiran Venkatesha , Ranjani Parthasarathi

SRAM-based FPGAs are popular in the aerospace industry for their field programmability and low cost. However, they suffer from cosmic radiation-induced Single Event Upsets (SEUs). Triple Modular Redundancy (TMR) is a well-known technique to…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-10-09 Khaza Anuarul Hoque , Otmane Ait Mohamed , Yvon Savaria

A large number of safety-critical control systems are based on N-modular redundant architectures, using majority voters on the outputs of independent computation units. In order to assess the compliance of these architectures with…

Software Engineering · Computer Science 2013-04-25 Francesco Flammini , Stefano Marrone , Nicola Mazzocca , Valeria Vittorini

The optimal fault-tolerance achievable by any protocol has been characterized in a wide range of settings. For example, for state machine replication (SMR) protocols operating in the partially synchronous setting, it is possible to…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-08-01 Andrew Lewis-Pye , Tim Roughgarden

Fault tolerance is achieved through multiply redundant hardware systems in large civil aircraft. This means of achieving fault tolerance is infeasible for small compact unmanned aerial vehicles. In this paper we apply a fault tolerant…

Optimization and Control · Mathematics 2016-10-12 Rudaba Khan , Paul Williams , Paul Riseborough , Asha Rao , Robin Hill

Reliability is necessary in safety-critical applications spanning numerous domains. Conventional hardware-based fault tolerance techniques, such as component redundancy, ensure reliability, typically at the expense of significantly…

The metric distortion framework posits that n voters and m candidates are jointly embedded in a metric space such that voters rank candidates that are closer to them higher. A voting rule's purpose is to pick a candidate with minimum total…

Computer Science and Game Theory · Computer Science 2023-07-03 Fatih Erdem Kizilkaya , David Kempe

With gate error rates in multiple technologies now below the threshold required for fault-tolerant quantum computation, the major remaining obstacle to useful quantum computation is scaling, a challenge greatly amplified by the huge…

Quantum Physics · Physics 2021-12-09 Kianna Wan , Soonwon Choi , Isaac H. Kim , Noah Shutty , Patrick Hayden

Understanding application resilience (or error tolerance) in the presence of hardware transient faults on data objects is critical to ensure computing integrity and enable efficient application-level fault tolerance mechanisms. However, we…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-02-16 Luanzheng Guo , Dong Li