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A trend towards energy-efficiency, security and privacy has led to a recent focus on deploying DNNs on microcontrollers. However, limits on compute and memory resources restrict the size and the complexity of the ML models deployable in…

Machine Learning · Computer Science 2020-10-19 Fernando García-Redondo , Shidhartha Das , Glen Rosendale

Reliability of an application or solution in production environment is one of the fundamental features where every SRE team is critically focused upon. At the same time achieving extreme reliability comes with the cost which include but not…

Software Engineering · Computer Science 2020-08-18 Kiran Mahesh ND

Dynamic Random Access Memory (DRAM) is the de-facto choice for main memory devices due to its cost-effectiveness. It offers a larger capacity and higher bandwidth compared to SRAM but is slower than the latter. With each passing generation,…

Hardware Architecture · Computer Science 2022-01-19 Kaustav Goswami , Hemanta Kumar Mondal , Shirshendu Das , Dip Sankar Banerjee

Next-generation supercomputers will feature more hierarchical and heterogeneous memory systems with different memory technologies working side-by-side. A critical question is whether at large scale existing HPC applications and emerging…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-04-27 Ivy Bo Peng , Stefano Markidis , Erwin Laure , Gokcen Kestor , Roberto Gioiosa

The increasing demands for computing performance have been a reality regardless of the requirements for smaller and more energy efficient devices. Throughout the years, the strategy adopted by industry was to increase the robustness of a…

Software Engineering · Computer Science 2019-05-07 Hugo Andrade , Ivica Crnkovic

The memory hierarchy has a high impact on the performance and power consumption in the system. Moreover, current embedded systems, included in mobile devices, are specifically designed to run multimedia applications, which are memory…

Hardware Architecture · Computer Science 2023-03-29 Josefa Díaz Álvarez , José L. Risco-Martín , J. Manuel Colmenar

Dynamic Resource Management (DRM) techniques can be leveraged to maximize throughput and resource utilization in computational clusters. Although DRM has been extensively studied through analytical workloads and simulations, skepticism…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-04-30 S. Iserte , M. Madon , G. Da , J. Pierson , A. J. Peña

While providing low latency is a fundamental requirement in deploying recommendation services, achieving high resource utility is also crucial in cost-effectively maintaining the datacenter. Co-locating multiple workers of a model is an…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-02-24 Yujeong Choi , John Kim , Minsoo Rhu

The emergence of resistive non-volatile memories opens the way to highly energy-efficient computation near- or in-memory. However, this type of computation is not compatible with conventional ECC, and has to deal with device unreliability.…

Emerging Technologies · Computer Science 2020-07-14 Marc Bocquet , Tifenn Hirtzlin , Jacques-Olivier Klein , Etienne Nowak , Elisa Vianello , Jean-Michel Portal , Damien Querlioz

Traditional data centers are designed with a rigid architecture of fit-for-purpose servers that provision resources beyond the average workload in order to deal with occasional peaks of data. Heterogeneous data centers are pushing towards…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-09-20 Carlos Vega , Jose Fernando Zazo , Hugo Meyer , Ferad Zyulkyarov , Sergio Lopez Buedo , Javier Aracil

Heterogeneous Memory Architecture (HMA) aims to optimize memory usage by leveraging a combination of memory types, such as high-bandwidth memory (HBM), commodity DRAM, and non-volatile memory (NVM), when utilized as main memory. To achieve…

Hardware Architecture · Computer Science 2026-04-23 Upasna , Venkata Kalyan Tavva

The cache plays a key role in determining the performance of applications, no matter for sequential or concurrent programs on homogeneous and heterogeneous architecture. Fixing cache misses requires to understand the origin and the type of…

Performance · Computer Science 2022-03-22 Jin Zhou , Steven , Tang , Hanmei Yang , Tongping Liu

Efficient memory management in heterogeneous systems is increasingly challenging due to diverse compute architectures (e.g., CPU, GPU, FPGA) and dynamic task mappings not known at compile time. Existing approaches often require programmers…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-07-29 Serhan Gener , Aditya Ukarande , Shilpa Mysore Srinivasa Murthy , Sahil Hassan , Joshua Mack , Chaitali Chakrabarti , Umit Ogras , Ali Akoglu

The idle computers on a local area, campus area, or even wide area network represent a significant computational resource---one that is, however, also unreliable, heterogeneous, and opportunistic. This type of resource has been used…

Distributed, Parallel, and Cluster Computing · Computer Science 2007-05-23 Adriana Iamnitchi , Ian Foster

Resistive memories have limited lifetime caused by limited write endurance and highly non-uniform write access patterns. Two main techniques to mitigate endurance-related memory failures are 1) wear-leveling, to evenly distribute the writes…

Hardware Architecture · Computer Science 2020-10-07 Leonid Yavits , Lois Orosa , Suyash Mahar , João Dinis Ferreira , Mattan Erez , Ran Ginosar , Onur Mutlu

Several emerging technologies for byte-addressable non-volatile memory (NVM) have been considered to replace DRAM as the main memory in computer systems during the last years. The disadvantage of a lower write endurance, compared to DRAM,…

Scaling to larger systems, with current levels of reliability, requires cost-effective methods to mitigate hardware failures. One of the main causes of hardware failure is an uncorrected error in memory, which terminates the current job and…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-09-06 Isaac Boixaderas , Sergi Moré , Javier Bartolome , David Vicente , Petar Radojković , Paul M. Carpenter , Eduard Ayguadé

This paper summarizes our work on experimentally analyzing, exploiting, and addressing vulnerabilities in multi-level cell NAND flash memory programming, which was published in the industrial session of HPCA 2017, and examines the work's…

Hardware Architecture · Computer Science 2018-05-10 Yu Cai , Saugata Ghose , Yixin Luo , Ken Mai , Onur Mutlu , Erich F. Haratsch

Recent breakthroughs in Deep Learning (DL) applications have made DL models a key component in almost every modern computing system. The increased popularity of DL applications deployed on a wide-spectrum of platforms have resulted in a…

Machine Learning · Computer Science 2018-09-17 Diana Marculescu , Dimitrios Stamoulis , Ermao Cai

Resource disaggregation offers a cost effective solution to resource scaling, utilization, and failure-handling in data centers by physically separating hardware devices in a server. Servers are architected as pools of processor, memory,…

Hardware Architecture · Computer Science 2023-01-20 Christina Giannoula , Kailong Huang , Jonathan Tang , Nectarios Koziris , Georgios Goumas , Zeshan Chishti , Nandita Vijaykumar