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One of the fundamental problems in the realm of peer-to-peer systems is that of determining their service capacities. In this paper, we focus on P2P scalability issues and propose models to compute the achievable throughput under distinct…

Networking and Internet Architecture · Computer Science 2019-03-05 Edmundo de Souza e Silva , Rosa M. Leao , Daniel S. Menasche , Don Towsley

We consider the problem of scheduling multiprocessor jobs to minimize the total completion time under the given energy budget. Each multiprocessor job requires more than one processor at the same moment of time. Processors may operate at…

Optimization and Control · Mathematics 2021-07-22 Alexander Kononov , Yulia Kovalenko

With rapidly evolving technology, multicore and manycore processors have emerged as promising architectures to benefit from increasing transistor numbers. The transition towards these parallel architectures makes today an exciting time to…

Distributed, Parallel, and Cluster Computing · Computer Science 2014-04-01 Ashkan Tousimojarad , Wim Vanderbauwhede

Over the past few years, there has been an increased interest in including FPGAs in data centers and high-performance computing clusters along with GPUs and other accelerators. As a result, it has become increasingly important to have a…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-09-14 Mostafa Eghbali Zarch , Reece Neff , Michela Becchi

The need for application-specific design of multicore/manycore processing platforms is evident with computing systems finding use in diverse application domains. In order to tailor multicore/manycore processors for application specific…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-03-14 Prasanna Kansakar , Arslan Munir

With multi-core processors a ubiquitous building block of modern supercomputers, it is now past time to enable applications to embrace these developments in processor design. To achieve exascale performance, applications will need ways of…

Distributed, Parallel, and Cluster Computing · Computer Science 2012-08-13 Michele Weiland , Lawrence Mitchell , Gerard Gorman , Stephan Kramer , Mark Parsons , James Southern

The recent woes of the supercomputer industry and changes in federal funding have caused some scientists to re-evaluate the means by which they hope to solve Grand Challenge problems. I evaluate the potential of Massively Parallel…

High Energy Physics - Lattice · Physics 2016-08-31 Rajan Gupta

Increasing popularity of trading digital assets can lead to significant delays in Blockchain networks when processing transactions. When transaction fees become miners' primary revenue, an imbalance in reward may lead to miners adopting…

Cryptography and Security · Computer Science 2023-04-03 Gerui Zhang , Xiongfei Zhao , Yain-Whar Si

In multi-core systems, various factors like inter-process communication, dependency, resource sharing and scheduling, level of parallelism, synchronization, number of available cores etc. influence the extent of possible High Performance…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-02-15 Urmila Shrawankar , Mayuri Joshi

We present Swallow, a scalable many-core architecture, with a current configuration of 480 x 32-bit processors. Swallow is an open-source architecture, designed from the ground up to deliver scalable increases in usable computational power…

Distributed, Parallel, and Cluster Computing · Computer Science 2015-04-27 Simon J. Hollis , Steve Kerrison

These days enterprise applications try to integrate online processing and batch jobs into a common software stack for seamless monitoring and driverless operations. Continuous integration of these systems results in choking of the poorly…

Performance · Computer Science 2015-12-16 Subrata Ashe

Efficient engineered systems require scalability. A scalable system has increasing performance with increasing system size. In an ideal case, the increase in performance (e.g., speedup) corresponds to the number of units that are added to…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-06-14 Heiko Hamann , Andreagiovanni Reina

According to the increasing complexity of network application and internet traffic, network processor as a subset of embedded processors have to process more computation intensive tasks. By scaling down the feature size and emersion of chip…

Hardware Architecture · Computer Science 2012-04-13 Mehdi Alipour , Hojjat Taghdisi

Rapid CMOS device size reduction resulted in billions of transistors on a chip have led to integration of many cores leading to many challenges such as increased power dissipation, thermal dissipation, occurrence of transient faults and…

Hardware Architecture · Computer Science 2023-04-12 Shashikiran Venkatesha , Ranjani Parthasarathi

Power consumption, off-chip memory bandwidth, chip area and Network on Chip (NoC) capacity are among main chip resources limiting the scalability of Chip Multiprocessors (CMP). A closed form analytical solution for optimizing the CMP cache…

Hardware Architecture · Computer Science 2017-05-23 Leonid Yavits , Amir Morad , Ran Ginosar

In this paper we examine the key elements determining the best performance of computing by increasing the frequency of a single chip and to get the minimum latency during execution of the programs to achieve best possible output. It is not…

Performance · Computer Science 2014-06-03 Kamran Latif

Memory allocation, though constituting only a small portion of the executed code, can have a "butterfly effect" on overall program performance, leading to significant and far-reaching impacts. Despite accounting for just approximately 5% of…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-08-29 Ruihao Li , Qinzhe Wu , Krishna Kavi , Gayatri Mehta , Jonathan C. Beard , Neeraja J. Yadwadkar , Lizy K. John

Heterogeneous computing is widely used at all levels of computing from data center to edge due to its power/performance characteristics. However, heterogeneity presents challenges. Interoperability---the management of workloads across…

Software Engineering · Computer Science 2020-05-19 Shuvra S. Bhattacharyya , Marilyn C. Wolf

In modern Commercial Off-The-Shelf (COTS) multicore systems, each core can generate many parallel memory requests at a time. The processing of these parallel requests in the DRAM controller greatly affects the memory interference delay…

Distributed, Parallel, and Cluster Computing · Computer Science 2014-07-29 Heechul Yun

Modern multicore processors are employing large last-level caches, for example Intel's E7-8800 processor uses 24MB L3 cache. Further, with each CMOS technology generation, leakage energy has been dramatically increasing and hence, leakage…

Hardware Architecture · Computer Science 2013-10-17 Sparsh Mittal