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Related papers: Yield, Area and Energy Optimization in Stt-MRAMs u…

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Sub/Near-threshold static random-access memory (SRAM) design is crucial for addressing the memory bottleneck in energy-constrained applications. However, the high integration density and reliability under process variations demand an…

Hardware Architecture · Computer Science 2022-02-25 Shan Shen , Peng Cao , Ming Ling , Longxing Shi

In this paper, we propose Zero Aware Configurable Data Encoding by Skipping Transfer (ZAC-DEST), a data encoding scheme to reduce the energy consumption of DRAM channels, specifically targeted towards approximate computing and error…

Hardware Architecture · Computer Science 2021-05-18 Chandan Kumar Jha , Shreyas Singh , Riddhi Thakker , Manu Awasthi , Joycee Mekie

Error Detection and Correction Codes (ECCs) are often used in digital designs to protect data integrity. Especially in safety-critical systems such as automotive electronics, ECCs are widely used and the verification of such complex logic…

Artificial Intelligence · Computer Science 2024-04-30 Aman Kumar

Transformer models rely on High-Performance Computing (HPC) resources for inference, where soft errors are inevitable in large-scale systems, making the reliability of the model particularly critical. Existing fault tolerance frameworks for…

Distributed, Parallel, and Cluster Computing · Computer Science 2025-08-14 Huangliang Dai , Shixun Wu , Jiajun Huang , Zizhe Jian , Yue Zhu , Haiyang Hu , Zizhong Chen

We describe verification techniques for embedded memory systems using efficient memory modeling (EMM), without explicitly modeling each memory bit. We extend our previously proposed approach of EMM in Bounded Model Checking (BMC) for a…

Logic in Computer Science · Computer Science 2011-11-09 Malay K. Ganai , Aarti Gupta , Pranav Ashar

Magnetic random access memory schemes employing magnetoelectric coupling to write binary information promise outstanding energy efficiency. We propose and demonstrate a purely antiferromagnetic magnetoelectric random access memory…

Efficiency is a fundamental property of any type of program, but it is even more so in the context of the programs executing on the blockchain (known as smart contracts). This is because optimizing smart contracts has direct consequences on…

Programming Languages · Computer Science 2023-01-13 Elvira Albert , Jesús Correas , Pablo Gordillo , Guillermo Román-Díez , Albert Rubio

This paper proposes a new class of permanent magnet-assisted three-phase switched reluctance motors (PM-SRMs) designed to achieve significantly higher torque density for electric vehicle (EV) propulsion systems. Eight distinct motor…

Systems and Control · Electrical Eng. & Systems 2025-05-12 Gholamreza Davarpanah , Sajjad Mohammadi

For mobile video codecs, the huge energy dissipation for external memory traffic is a critical challenge under the battery power constraint. Lossy embedded compression (EC), as a solution to this challenge, is considered in this paper.…

Multimedia · Computer Science 2016-05-11 Li Guo , Dajiang Zhou , Shinji Kimura , Satoshi Goto

The elastocaloric (eC) effects of natural rubber (NR) and shape memory alloys (SMAs) are compared and potential improvement for eC performances of SMAs is proposed. Both the plateau and hysteresis of stress-strain curve in NR and SMAs are…

Materials Science · Physics 2016-06-17 Zhongjian Xie , Gael Sebald , Daniel Guyomar

PCM is a popular backing memory for DRAM main memory in tiered memory systems. PCM has asymmetric access energy; writes dominate reads. MLC asymmetry can vary by an order of magnitude. Many schemes have been developed to take advantage of…

Hardware Architecture · Computer Science 2021-12-06 Stephen Longofono , Seyed Mohammad Seyedzadeh , Alex K. Jones

Non-volatile magnetic storage, from 1940s magnetic core to present day racetrack memory and magnetic anisotropy switching devices rely on the metastability of magnetic domains to store information. However, the inherent inefficiency of…

Cache plays a critical role in reducing the performance gap between CPU and main memory. A modern multi-core CPU generally employs a multi-level hierarchy of caches, through which the most recently and frequently used data are maintained in…

Hardware Architecture · Computer Science 2021-06-01 Rui Wang , Chundong Wang , Chongnan Ye

The growing demand for highly reliable communication systems drives the research and development of algorithms that identify and correct errors during data transmission and storage. This need becomes even more critical in hard-to-access or…

Cryptography and Security · Computer Science 2025-04-17 Andrew Rafael Fritsch , César Augusto Missio Marcon

Resistive memories have limited lifetime caused by limited write endurance and highly non-uniform write access patterns. Two main techniques to mitigate endurance-related memory failures are 1) wear-leveling, to evenly distribute the writes…

Hardware Architecture · Computer Science 2020-10-07 Leonid Yavits , Lois Orosa , Suyash Mahar , João Dinis Ferreira , Mattan Erez , Ran Ginosar , Onur Mutlu

Resource constraints in smart devices demand an efficient cryptosystem that allows for low power and memory consumption. This has led to popularity of comparatively efficient Elliptic curve cryptog-raphy (ECC). Prior to this paper, much of…

Cryptography and Security · Computer Science 2015-02-09 Yasir Malik

Logical qubits can be protected from decoherence by performing QEC cycles repeatedly. Algorithms for fault-tolerant QEC must be compiled to the specific hardware platform under consideration in order to practically realize a quantum memory…

Quantum Physics · Physics 2025-05-13 Sascha Heußen , David F. Locher , Markus Müller

A List Viterbi detector produces a rank ordered list of the N globally best candidates in a trellis search. A List Viterbi detector structure is proposed that incorporates the noise prediction with periodic state-metric updates based on…

Information Theory · Computer Science 2013-07-24 Suayb. S. Arslan , Jaewook Lee , Turguy Goker

Ferroelectric field effect transistor (FeFET) memory has shown the potential to meet the requirements of the growing need for fast, dense, low-power, and non-volatile memories. In this paper, we propose a memory architecture named…

Systems and Control · Electrical Eng. & Systems 2022-05-25 Mor M. Dahan , Evelyn T. Breyer , Stefan Slesazeck , Thomas Mikolajick , Shahar Kvatinsky

Rate-compatible error-correcting codes (ECCs), which consist of a set of extended codes, are of practical interest in both wireless communications and data storage. In this work, we first study the lower bounds for rate-compatible ECCs,…

Information Theory · Computer Science 2017-05-22 Pengfei Huang , Yi Liu , Xiaojie Zhang , Paul H. Siegel , Erich F. Haratsch