Related papers: Fast Prefix Adders for Non-Uniform Input Arrival T…
In Carry Propagate Adders, carry propagation is the critical delay. The most efficient scheme is to generate Cout0 (Cin=0) and Cout1(Cin=1) and multiplex the correct output according to Cin. For any radix, the carry output is always 0/1. We…
The rapid updates in error-resilient applications along with their quest for high throughput have motivated designing fast approximate functional units for Field-Programmable Gate Arrays (FPGAs). Studies that proposed imprecise functional…
We present an algorithm for planning trajectories that avoid obstacles and satisfy key-door precedence specifications expressed with a fragment of signal temporal logic. Our method includes a novel exact convex partitioning of the obstacle…
This article presents the design of a new asynchronous early output full adder which when cascaded leads to a relative-timed ripple carry adder (RCA). The relative-timed RCA requires imposing a very small relative-timing assumption to…
Many concurrent algorithms require processes to perform fetch-and-add operations on a single memory location, which can be a hot spot of contention. We present a novel algorithm called Aggregating Funnels that reduces this contention by…
We present a new unified framework for minimizing congestion-dependent network cost in information-centric networks by jointly optimizing forwarding and caching strategies. As caching variables are integer-constrained, the resulting…
The transducer architecture is becoming increasingly popular in the field of speech recognition, because it is naturally streaming as well as high in accuracy. One of the drawbacks of transducer is that it is difficult to decode in a fast…
Implementing embedded neural network processing at the edge requires efficient hardware acceleration that couples high computational performance with low power consumption. Driven by the rapid evolution of network architectures and their…
An effective way to reduce clutter in a graph drawing that has (many) crossings is to group edges that travel in parallel into \emph{bundles}. Each edge can participate in many such bundles. Any crossing in this bundled graph occurs between…
An algebraic number $\beta \in \mathbb{C}$ with no conjugate of modulus 1 can serve as the base of a numeration system $(\beta, \mathcal{A})$ with parallel addition, i.e., the sum of two operands represented in base $\beta$ with digits from…
In this study, we construct the quantum reversible counterparts of the logical AND, OR, XOR, NOR, and NAND gates. We utilize a quantum Fourier transform (QFT)-based adder circuit that replicates the functionality of a digital half-adder,…
We consider a Multi-Agent Path Finding (MAPF) setting where agents have been assigned a plan, but during its execution some agents are delayed. Instead of replanning from scratch when such a delay occurs, we propose delay introduction,…
In this paper, we analyze the formation of small stopping sets in joint factor graphs describing a frame-asynchronous two-user transmission. Furthermore, we propose an algorithm to completely avoid small stopping sets in the joint factor…
This paper explores the application of a new algebraic method of edge coloring, called complex coloring, to the scheduling problems of input queued switches. The proposed distributed parallel scheduling algorithm possesses two important…
Fault-tolerant quantum computers compose elements of a discrete gate set in order to approximate a target unitary. The problem of minimising the number of gates is known as gate-synthesis. The approximation error is a form of coherent…
Inaccurate circuits make possible the conservation of limited resources, such as energy. But effective design of such circuits requires an understanding of resulting tradeoffs between accuracy and design parameters, such as voltages and…
In this work faster unsigned multiplication has been achieved by using a combination of High Performance Multiplication [HPM] column reduction technique and implementing a N-bit multiplier using 4 N/2-bit multipliers (recursive…
Given a temporal graph G, a source vertex s, and a departure time at source vertex t_s, the earliest arrival time problem EAT is to start from s on or after t_s and reach all the vertices in G as early as possible. Ni et al. have proposed a…
Quantum addition circuits are considered being of two types: 1) Toffolli-adder circuits which use only classical reversible gates (CNOT and Toffoli), and 2) QFT-adder circuits based on the quantum Fourier transformation. We present the…
Today's PCs can directly manipulate numbers not longer than 64 bits because the size of the CPU registers and the data-path are limited. Consequently, arithmetic operations such as addition, can only be performed on numbers of that length.…