Related papers: ATCA-based ATLAS FTK input interface system
The main goal of this contribution is to explain how to use interlacing techniques for LTI controllers implementation and analyze different struc- tures in this environment. These considerations lead to an important com- putation saving in…
Knowledge Tracing (KT) models face a critical ``Performance-Complexity Trap'': capturing complex cognitive dynamics like learning sessions and memory decay typically requires deep hierarchical architectures, which incur prohibitive…
Recent top-performing temporal 3D detectors based on Lidars have increasingly adopted region-based paradigms. They first generate coarse proposals, followed by encoding and fusing regional features. However, indiscriminate sampling and…
The LHC is expected to increase its center-of-mass energy from 13 TeV to 14 TeV for Run 3 scheduled from 2022 to 2024. After Run 3, upgrades for the High-Luminosity-LHC (HL-LHC) programme are planned and the operation will start in 2027,…
Electronic systems for qubit control and measurement serve as a bridge between quantum programming language and quantum information processors. With the rapid development of superconducting quantum circuit (SQC) technology, synchronization…
The LHC will undergo a major upgrade starting in 2025 towards the High Luminosity LHC (HL-LHC) to increase the instantaneous luminosity by a factor of 5 to 7 compared to the nominal value. The Phase-II Upgrade (2025-2027) will require the…
The ATLAS Inner Tracker, the future innermost part of the ATLAS detector, is an all-silicon tracker composed of pixel and strip modules, designed to cope with the extreme conditions expected during High-Luminosity LHC runs. Thorough testing…
Iterative Learning Control (ILC) can achieve perfect tracking performance for mechatronic systems. The aim of this paper is to present an ILC design tutorial for industrial mechatronic systems. First, a preliminary analysis reveals the…
The fast Fourier transform, FFT, is a useful and prevalent algorithm in signal processing. It characterizes the spectral components of a signal, or is used in combination with other operations to perform more complex computations such as…
The Address in Real Time Data Driver Card (ADDC) is designed to transmit the trigger data in the Micromegas detector of the ATLAS New Small Wheel (NSW) upgrade. The ART signals are generated by the front end ASIC, named VMM chip, to…
The establishment of fast and reliable communication technologies, such as 5G, is enabling the evolution of a new generation of connected ADAS. This work aims to develop a traffic light advisory system, Multiple Traffic Light Advisor…
After the current shutdown, the LHC is about to resume operation for a new data-taking period, when it will operate with increased luminosity, event rate and center of mass energy. The new conditions will impose more demanding constraints…
Deploying models on target domain data subject to distribution shift requires adaptation. Test-time training (TTT) emerges as a solution to this adaptation under a realistic scenario where access to full source domain data is not available…
The Transformer architecture aggregates input information through the self-attention mechanism, but there is no clear understanding of how this information is mixed across the entire model. Additionally, recent works have demonstrated that…
Advanced Persistent Threats (APTs) evolve through multiple stages, each exhibiting distinct temporal and structural behaviors. Accurate stage estimation is critical for enabling adaptive cyber defense. This paper presents StageFinder, a…
Some preliminary thoughts on how to design and develop the DAQ architecture for the Silicon tracking system at the future Linear electron positron collider, are briefly presented here. The proposed structure includes three DAQ levels. The…
A new field programmable gate array (FPGA)-based emulation platform is proposed to accelerate fault tolerance analysis of inference accelerators of convolutional neural networks (CNN). For a given CNN model, hardware accelerator…
Vision-language tracking aims to locate the target object in the video sequence using a template patch and a language description provided in the initial frame. To achieve robust tracking, especially in complex long-term scenarios that…
This paper presents the design and simulation results of a gigabit transceiver Application Specific Integrated Circuit (ASIC) called GBCR for the ATLAS Inner Tracker (ITk) Pixel detector readout upgrade. GBCR has four upstream receiver…
We present a development of the ALFRED framework that includes support for the IPbus protocol, created for the Fast Interaction Trigger (FIT) detector in the ALICE experiment at CERN. This modification resolves the incompatibility between…