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Signal Temporal Logic (STL) is a formalism used to rigorously specify requirements of cyberphysical systems (CPS), i.e., systems mixing digital or discrete components in interaction with a continuous environment or analog com- ponents. STL…

Systems and Control · Computer Science 2015-06-30 Jyotirmoy V. Deshmukh , Alexandre Donzé , Shromona Ghosh , Xiaoqing Jin , Garvit Juniwal , Sanjit A. Seshia

An important problem that arises during the execution of service-based applications concerns the ability to determine whether a running service can be substituted with one with a different interface, for example if the former is no longer…

Logic in Computer Science · Computer Science 2010-04-19 Marcello M. Bersani , Luca Cavallaro , Achille Frigeri , Matteo Pradella , Matteo Rossi

Runtime verification is an effective automated method for specification-based offline testing and analysis as well as online monitoring of complex systems. The specification language is often a variant of regular expressions or a popular…

Logic in Computer Science · Computer Science 2014-11-11 Ramy Medhat , Yogi Joshi , Borzoo Bonakdarpour , Sebastian Fischmeister

Offline runtime verification involves the static analysis of executions of a system against a specification. For distributed systems, it is generally not possible to characterize executions in the form of global traces, given the absence of…

Software Engineering · Computer Science 2024-03-06 Erwan Mahe , Boutheina Bannour , Christophe Gaston , Arnault Lapitre , Pascale Le Gall

We present Quickstrom, a property-based testing system for acceptance testing of interactive applications. Using Quickstrom, programmers can specify the behaviour of web applications as properties in our testing-oriented dialect of Linear…

Programming Languages · Computer Science 2022-03-23 Liam O'Connor , Oskar Wickström

Signal Temporal Logic monitoring over numerical simulation traces has emerged as an effective approach to approximate verification of continuous and hybrid systems. In this report we explore an exact verification procedure for STL…

Logic in Computer Science · Computer Science 2020-08-18 Thomas Wright , Ian Stark

Verification of large and complicated concurrent programs is an important issue in the software world. Stateless model checking is an appropriate method for systematically and automatically testing of large programs, which has proved its…

Programming Languages · Computer Science 2016-03-14 Elaheh Ghassabani , Mohammad Abdollahi Azgomi

Runtime verification enables checking temporal logic specifications over individual execution traces and offers a scalable alternative to exhaustive formal verification. In practice, systems must satisfy dozens to hundreds of temporal…

Logic in Computer Science · Computer Science 2026-05-14 Arınç Demir , Dogan Ulus

The problem of checking a logged event trace against a temporal logic specification arises in many practical cases. Unfortunately, known algorithms for an expressive logic like MTL (Metric Temporal Logic) do not scale with respect to two…

Software Engineering · Computer Science 2015-08-27 Marcello M. Bersani , Domenico Bianculli , Carlo Ghezzi , Srdan Krstic , Pierluigi San Pietro

The two major systems of formal verification are model checking and algebraic model-based testing. Model checking is based on some form of temporal logic such as linear temporal logic (LTL) or computation tree logic (CTL). One powerful and…

Logic in Computer Science · Computer Science 2019-01-31 Stefan D. Bruda , Sunita Singh , A. F. M. Nokib Uddin , Zhiyu Zhang , Rui Zuo

Metric Temporal Logic (MTL) is a popular formalism to specify temporal patterns with timing constraints over the behavior of cyber-physical systems with application areas ranging in property-based testing, robotics, optimization, and…

Logic in Computer Science · Computer Science 2026-03-11 Dogan Ulus

We propose a verified approach to the formal verification of timed properties using model-checking techniques. We focus on properties expressed using real-time specification patterns, which can be viewed as a subset of timed temporal logics…

Logic in Computer Science · Computer Science 2013-02-01 Nouha Abid , Silvano Dal Zilio , Didier Le Botlan

In various service-oriented applications such as distributed autonomous delivery, healthcare, tourism, transportation, and many others, where service agents need to perform serial and time-bounded tasks to achieve their goals, quality of…

Logic in Computer Science · Computer Science 2023-08-11 Ernest Bonnah , Khaza Anuarul Hoque

Process mining extracts valuable insights from event data to help organizations improve their business processes, which is essential for their growth and success. By leveraging process mining techniques, organizations gain a comprehensive…

Databases · Computer Science 2024-06-14 Nesma M. Zaki , Iman M. A. Helal , Ehab E. Hassanein , Ahmed Awad

We present a monitoring approach for verifying systems at runtime. Our approach targets systems whose components communicate with the monitors over unreliable channels, where messages can be delayed or lost. In contrast to prior works,…

Logic in Computer Science · Computer Science 2017-07-19 David Basin , Felix Klaedtke , Eugen Zălinescu

The verification of asynchronous software components poses significant challenges due to the way components interleave and exchange input/output data concurrently. Compositional strategies aim to address this by separating the task of…

Logic in Computer Science · Computer Science 2026-03-11 Alberto Bombardelli , Stefano Tonetta

We study monitoring of linear-time arithmetic properties against finite traces generated by an unknown dynamic system. The monitoring state is determined by considering at once the trace prefix seen so far, and all its possible…

Logic in Computer Science · Computer Science 2022-12-01 Paolo Felli , Marco Montali , Fabio Patrizi , Sarah Winkler

The emergence of the Industrial Internet results in an increasing number of complicated temporal interdependencies between automation systems and the processes to be controlled. There is a need for verification methods that scale better…

Software Engineering · Computer Science 2017-04-26 Eero Siivola , Seppo Sierla , Hannu Niemistö , Tommi Karhela , Valeriy Vyatkin

This paper investigates the online monitoring problem for cyber-physical systems under signal temporal logic (STL) specifications. The objective is to design an online monitor that evaluates system correctness at runtime based on partial…

Optimization and Control · Mathematics 2025-05-27 Tao Han , Shaoyuan Li , Xiang Yin

This paper introduces a novel technique to decide the satisfiability of formulae written in the language of Linear Temporal Logic with Both future and past operators and atomic formulae belonging to constraint system D (CLTLB(D) for short).…

Logic in Computer Science · Computer Science 2014-02-12 Marcello M. Bersani , Achille Frigeri , Angelo Morzenti , Matteo Pradella , Matteo Rossi , Pierluigi San Pietro
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