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The asymptotic iterative decoding performances of low-density parity-check (LDPC) codes using min-sum (MS) and sum-product (SP) decoding algorithms on memoryless binary-input output-symmetric (MBIOS) channels are analyzed in this paper. For…
This paper presents approaches to develop efficient network for non-binary quasi-cyclic LDPC (QC-LDPC) decoders. By exploiting the intrinsic shifting and symmetry properties of the check matrices, significant reduction of memory size and…
This paper presents novel techniques for improving the error correction performance and reducing the complexity of coarsely quantized 5G-LDPC decoders. The proposed decoder design supports arbitrary message-passing schedules on a…
Ordered statistics decoding has been instrumental in addressing decoding failures that persist after normalized min-sum decoding in short low-density parity-check codes. Despite its benefits, the high computational complexity of effective…
Linear complementary dual (LCD) cyclic codes were referred historically to as reversible cyclic codes, which had applications in data storage. Due to a newly discovered application in cryptography, there has been renewed interest in LCD…
In this paper we study the iterative decoding threshold performance of non-binary spatially-coupled low-density parity-check (NB-SC-LDPC) code ensembles for both the binary erasure channel (BEC) and the binary-input additive white Gaussian…
This paper investigates decoder diversity architectures for short low-density parity-check (LDPC) codes, based on recurrent neural network (RNN) models of the belief-propagation (BP) algorithm. We propose a new approach to achieve decoder…
In this paper, we investigate novel strategies for generating rate-compatible (RC) irregular low-density parity-check (LDPC) codes with short/moderate block lengths. We propose three puncturing and two extension schemes, which are designed…
In this paper, a construction of a pair of "regular" quasi-cyclic LDPC codes as ingredient codes for a quantum error-correcting code is proposed. That is, we find quantum regular LDPC codes with various weight distributions. Furthermore our…
This paper presents a practical writing/reading scheme in nonvolatile memories, called balanced modulation, for minimizing the asymmetric component of errors. The main idea is to encode data using a balanced error-correcting code. When…
We solve the problem of designing powerful low-density parity-check (LDPC) codes with iterative decoding for the block-fading channel. We first study the case of maximum-likelihood decoding, and show that the design criterion is rather…
Low-density parity-check (LDPC) codes with the parity-based approach for distributed joint source channel coding (DJSCC) with decoder side information is described in this paper. The parity-based approach is theoretical limit achievable.…
In this paper, a practical coding scheme is designed for the binary Wyner-Ziv (WZ) problem by using nested low-density generator-matrix (LDGM) and low-density parity-check (LDPC) codes. This scheme contains two steps in the encoding…
Spatially coupled low-density parity-check (SC-LDPC) codes are a class of capacity approaching LDPC codes with low message recovery latency when a sliding window decoding is used. In this paper, we first present a new method for the…
In this paper, the application of non-binary low-density parity-check (NBLDPC) codes to MIMO systems which employ hundreds of antennas at both the transmitter and the receiver has been proposed. Together with the well-known low-complexity…
An LDPC coded modulation scheme with probabilistic shaping, optimized interleavers and noniterative demapping is proposed. Full-field simulations show an increase in transmission distance by 8% compared to uniformly distributed input.
A class of doubly-generalized low-density parity-check (D-GLDPC) codes, where single parity-check (SPC) codes are used as variable nodes (VNs), is investigated. An expression for the growth rate of the weight distribution of any D-GLDPC…
For efficient modulation and error control coding, the deliberate flipping approach imposes the run-length-limited(RLL) constraint by bit error before recording. From the read side, a high coding rate limits the correcting capability of RLL…
This work considers the design of short non-binary low-density parity-check (LDPC) codes over finite fields of order m, for channels with phase noise. In particular, m-ary differential phase-shift keying (DPSK) modulated code symbols are…
Distributed storage systems suffer from significant repair traffic generated due to frequent storage node failures. This paper shows that properly designed low-density parity-check (LDPC) codes can substantially reduce the amount of…