Related papers: Efficient synthesis of universal Repeat-Until-Succ…
Unitary decomposition is a widely used method to map quantum algorithms to an arbitrary set of quantum gates. Efficient implementation of this decomposition allows for translation of bigger unitary gates into elementary quantum operations,…
Rapid Single Flux Quantum (RSFQ) logic is a promising technology to supersede Complementary metal-oxide-semiconductor (CMOS) logic in some specialized areas due to providing ultra-fast and energy-efficient circuits. To realize a large-scale…
The Clifford$+T$ gate set is commonly used to perform universal quantum computation. In such setup the $T$ gate is typically much more expensive to implement in a fault-tolerant way than Clifford gates. To improve the feasibility of…
The synthesis approaches for quantum circuits typically aim at minimizing the number of lines or gates. Given the tight restrictions on those logical resources in physical implementations, we propose to view the problem fundamentally…
We present two classical algorithms for the simulation of universal quantum circuits on $n$ qubits constructed from $c$ instances of Clifford gates and $t$ arbitrary-angle $Z$-rotation gates such as $T$ gates. Our algorithms complement each…
Compiling programs to an instruction set architecture (ISA) requires a set of rewrite rules that map patterns consisting of compiler instructions to patterns consisting of ISA instructions. We synthesize such rules by constructing SMT…
We perform optimal-control-theory calculations to determine the minimum number of two-qubit CNOT gates needed to perform quantum state preparation and unitary operator synthesis for few-qubit systems. By considering all possible gate…
Analog circuit topology synthesis is integral to Electronic Design Automation (EDA), enabling the automated creation of circuit structures tailored to specific design requirements. However, the vast design search space and strict constraint…
A central ingredient in fault-tolerant quantum algorithms is the initialization of a logical state for a given quantum error-correcting code from a set of noisy qubits. A scheme that has demonstrated promising results for small code…
A critical step in developing circuits for quantum simulation is to synthesize a desired unitary operator using the circuit building blocks. Studying unitaries and their generators from the Lie algebraic perspective has given rise to…
It is known that a quantum circuit may be simulated with classical hardware via stabilizer state (T-)decomposition in $O(2^{\alpha t})$ time, given $t$ non-Clifford gates and a decomposition efficiency $\alpha$. The past years have seen a…
With recent advancements in quantum computing technology, optimizing quantum circuits and ensuring reliable quantum state preparation have become increasingly vital. Traditional methods often demand extensive expertise and manual…
We present a completely automatic synthesis framework for oracle functions, a central part in many quantum algorithms. The proposed framework for resource-constrained oracle synthesis (ROS) is a LUT-based hierarchical method in which every…
Given a quantum algorithm, it is highly nontrivial to devise an efficient sequence of physical gates implementing the algorithm on real hardware and incorporating topological quantum error correction. In this paper, we present a first step…
We introduce the flag decomposition as a central tool for unitary synthesis. It lets us carve out a diagonal unitary with $2^n$ degrees of freedom in such a way that the remaining flag circuit is parametrized by the optimal number of…
Let $n$ be a positive integer divisible by 8. The Clifford-cyclotomic gate set $\mathcal{G}_n$ consists of the Clifford gates, together with a $z$-rotation of order $n$. It is easy to show that, if a circuit over $\mathcal{G}_n$ represents…
Since being analyzed by Rokhlin, Szlam, and Tygert and popularized by Halko, Martinsson, and Tropp, randomized Simultaneous Power Iteration has become the method of choice for approximate singular value decomposition. It is more accurate…
In this paper we study the Clifford+Toffoli universal fault-tolerant gate set. We introduce a generating set in order to represent any unitary implementable by this gate set and with this we derive a bound on the Toffoli-count of arbitrary…
Convergence of classical parallel iterations is detected by performing a reduction operation at each iteration in order to compute a residual error relative to a potential solution vector. To efficiently run asynchronous iterations,…
In this paper, a library-based synthesis methodology for reversible circuits is proposed where a reversible specification is considered as a permutation comprising a set of cycles. To this end, a pre-synthesis optimization step is…