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RISC-V is an extendable Instruction Set Architecture, growing in popularity for embedded systems. However, optimizing it to specific requirements, imposes a great deal of manual effort. To bridge the gap between software and ISA, the tool…

Hardware Architecture · Computer Science 2025-08-12 Andreas Hager-Clukas , Philipp van Kempen , Stefan Wallentowitz

The enhanced efficiency of hardware accelerators, including Single Instruction Multiple Data (SIMD) architectures and Coarse-Grained Reconfigurable Architectures (CGRAs), is driving significant advancements in Artificial Intelligence and…

Hardware Architecture · Computer Science 2025-04-29 Yu Yang , Jordi Altayó González , Paul Delestrac , Ahmed Hemani

The design of embedded systems, that are ubiquitously used in mobile devices and cars, is becoming continuously more complex such that efficient system-level design methods are becoming crucial. My research aims at developing systems that…

Artificial Intelligence · Computer Science 2019-05-15 Philipp Wanko

Existing model-based processes for embedded real-time systems support the analysis of various non-functional properties, most notably schedulability, through model checking, simulation or other means. The analysis results are then used for…

Software Engineering · Computer Science 2018-06-27 Fotios Gioulekas , Peter Poplavko , Panagiotis Katsaros , Pedro Palomo

Recent advancements in quantization and mixed-precision approaches offers substantial opportunities to improve the speed and energy efficiency of Neural Networks (NN). Research has shown that individual parameters with varying low…

Hardware Architecture · Computer Science 2024-08-14 Giorgos Armeniakos , Alexis Maras , Sotirios Xydis , Dimitrios Soudris

Memory load/store instructions consume an important part in execution time and energy consumption in domain-specific accelerators. For designing highly parallel systems, available parallelism at each granularity is extracted from the…

Hardware Architecture · Computer Science 2022-09-07 Khushal Sethi

In the large-scale high energy physics experiments multi-channel readout application specific integrated circuits (ASICs) are widely used. The ASICs for such experiments are complicated systems, which usually include both analog and digital…

Instrumentation and Detectors · Physics 2018-03-21 A. Voronin , E. Malankin

Simple graph algorithms such as PageRank have been the target of numerous hardware accelerators. Yet, there also exist much more complex graph mining algorithms for problems such as clustering or maximal clique listing. These algorithms are…

Industrial Edge AI programs often begin with the model and only later confront the platform. That sequencing is attractive because it allows early demonstrations, but it breaks down when the deployment target is an embedded system with long…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-05-27 Pitchai Muthu M

Modern microarchitectures are some of the world's most complex man-made systems. As a consequence, it is increasingly difficult to predict, explain, let alone optimize the performance of software running on such microarchitectures. As a…

Performance · Computer Science 2019-03-06 Andreas Abel , Jan Reineke

In the future, embedded processors must process more computation-intensive network applications and internet traffic and packet-processing tasks become heavier and sophisticated. Since the processor performance is severely related to the…

Hardware Architecture · Computer Science 2012-05-10 Mehdi Alipour , Mostafa E. Salehi , Hesamodin shojaei baghini

Processors with extensible instruction sets are often used today as programmable hardware accelerators for various domains. When extending RISC-V and other similar extensible processor architectures, the task of designing specialized…

Hardware Architecture · Computer Science 2024-01-02 Peter Sovietov

This report makes the case that a well-designed Reduced Instruction Set Computer (RISC) can match, and even exceed, the performance and code density of existing commercial Complex Instruction Set Computers (CISC) while maintaining the…

Hardware Architecture · Computer Science 2016-07-11 Christopher Celio , Palmer Dabbelt , David A. Patterson , Krste Asanović

Application specific simulation is challenging task in various real time high performance embedded devices. In this study specific application is implemented with the help of Xilinx. Xilinx provides SDK and XPS tools, XPS tools used for…

Hardware Architecture · Computer Science 2014-07-02 Ravi Khatwal , Manoj Kumar Jain

This paper presents an implementation of a floating-point-capable application-specific instruction set processor (ASIP) for both communication and positioning tasks using the massive multiple-input multiple-output (MIMO) technology. The…

Hardware Architecture · Computer Science 2025-02-17 Mohammad Attari , Ove Edfors , Liang Liu

This paper makes the case for a single-ISA heterogeneous computing platform, AISC, where each compute engine (be it a core or an accelerator) supports a different subset of the very same ISA. An ISA subset may not be functionally complete,…

Hardware Architecture · Computer Science 2018-03-20 Alexandra Ferreron , Jesus Alastruey-Benede , Dario Suarez-Gracia , Ulya R. Karpuzcu

Embedded systems are playing an increasingly important role in control engineering. Despite their popularity, embedded systems are generally subject to resource constraints and it is therefore difficult to build complex control systems on…

Other Computer Science · Computer Science 2008-09-30 Longhua Ma , Feng Xia , Zhe Peng

Using parallel embedded systems these days is increasing. They are getting more complex due to integrating multiple functionalities in one application or running numerous ones concurrently. This concerns a wide range of applications,…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-07-18 Hasna Bouraoui , Chadlia Jerad , Omar Romdhani , Jeronimo Castrillon

As the computing landscape evolves, system designers continue to explore design methodologies that leverage increased levels of heterogeneity to push performance within limited size, weight, power, and cost budgets. One such methodology is…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-04-26 Joshua Mack , Serhan Gener , Sahil Hassan , H. Umut Suluhan , Ali Akoglu

Instruction density and encoding efficiency are some of the few things directly affected by an instruction set architecture's design. In contrast, a processor's implementation often significantly influences performance, power efficiency,…

Hardware Architecture · Computer Science 2025-10-07 Emad Jacob Maroun