Related papers: Floorplanning and Topology Generation for Applicat…
Despite numerous advantages, non-orthogonal multiple access (NOMA) technique can bring additional interference for the neighboring ultra-dense networks if the power consumption of the system is not properly optimized. While targeting on the…
In this paper, we propose a graph neural network architecture to solve the AC power flow problem under realistic constraints. To ensure a safe and resilient operation of distribution grids, AC power flow calculations are the means of choice…
Transmission Topology Optimization has great potential to improve efficiency and flexibility of grid operations through non-costly switching actions, but previous approaches struggle with runtime performance and scalability. In this work,…
With relentless CMOS technology downsizing Networks-on-Chips (NoCs) are inescapably experiencing escalating susceptibility to wearout and reduced reliability. While faults in processors and memories may be masked via redundancy, or…
Field-coupled Nanocomputing (FCN) is a class of promising post-CMOS technologies that transmit information through electric or magnetic fields instead of current flow. They utilize basic building blocks called cells, which can form gates…
The service provided by mobile networks operated today is not adapted to spatio-temporal fluctuations in traffic demand, although such fluctuations offer opportunities for energy savings. In particular, significant gains in energy…
The design of fluid channel structures of reactors or separators of chemical processes is key to enhancing the mass transfer processes inside the devices. However, the systematic design of channel topological structures is difficult for…
Recently, we proposed a capacity expansion approach for transmission grids that combines the upgrade of transmission capacity with a transition in system structure to improve grid operation. The key to this concept is a particular hybrid…
A special scenario of the topology in the hybrid Cognitive Ad-hoc networks is studied and a novel cross layer scheme is proposed in this paper. The proposed scheme integrated the attributes both of the new performance evaluation machine…
This work aims at optimizing injection networks, which consist in adding a set of long-range links (called bypass links) in mobile multi-hop ad hoc networks so as to improve connectivity and overcome network partitioning. To this end, we…
The increasing density of transistors in Integrated Circuits (ICs) has enabled the development of highly integrated Systems-on-Chip (SoCs) and, more recently, Multiprocessor Systems-on-Chip (MPSoCs). To address scalability challenges in…
Heterogeneous 3D System-on-Chips (3D SoCs) are the most promising design paradigm to combine sensing and computing within a single chip. A special characteristic of communication networks in heterogeneous 3D SoCs is the varying latency and…
Cloud deployments now increasingly provision FPGA accelerators as part of virtual instances. While FPGAs are still essentially single-tenant, the growing demand for hardware acceleration will inevitably lead to the need for methods and…
Power distribution in remote communities often depends on off-grid microgrids. In order to address the reliability challenges for these microgrids, we develop a mathematical model for topology design, capacity planning, and operation of…
Topology Optimization seeks to find the best design that satisfies a set of constraints while maximizing system performance. Traditional iterative optimization methods like SIMP can be computationally expensive and get stuck in local…
Non-orthogonal multiple access (NOMA) allows multiple users to simultaneously access the same time-frequency resource by using superposition coding and successive interference cancellation (SIC). Thus far, most papers on NOMA have focused…
The increasing popularity of deep neural network (DNN) applications demands high computing power and efficient hardware accelerator architecture. DNN accelerators use a large number of processing elements (PEs) and on-chip memory for…
Network-on-Chip (NoC) paradigm has been proposed as an auspicious solution to handle the strict communication requirements between the increasingly large number of cores on a single multi and many-core chips. However, NoC systems are…
Wireless Network-on-Chip (WNoC) appears as a promising alternative to conventional interconnect fabrics for chip-scale communications. WNoC takes advantage of an overlaid network composed by a set of millimeter-wave antennas to reduce…
The transient response of power grids to external disturbances influences their stable operation. This paper studies the effect of topology in linear time-invariant dynamics of different power grids. For a variety of objective functions, a…