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The design of efficient quantum circuits is an important issue in quantum computing. It is in general a formidable task to find a highly optimized quantum circuit for a given unitary matrix. We propose a quantum circuit design method that…
Many universal reversible libraries that contain more than one gate type have been proposed in the literature. Practical implementation of reversible circuits is much easier if a single gate type is used in the circuit construction. This…
We introduce a novel logic style with self-checking capability to enhance hardware reliability at logic level. The proposed logic cells have two-rail inputs/outputs, and the functionality for each rail of outputs enables construction of…
We present new algorithms to synthesize exact universal reversible gate library for various types of gates and costs. We use the powerful algebraic software GAP for implementation and examination of our algorithms and the reversible logic…
Coherent gate errors are a concern in many proposed quantum computing architectures. These errors can be effectively handled through composite pulse sequences for single-qubit gates, however, such techniques are less feasible for entangling…
The problem of determining lower bounds for the energy cost of a given nanoscale design is addressed via a complexity theory-based approach. This paper provides a theoretical framework that is able to assess the trade-offs existing in…
We introduce a new scheme for quantum circuit design called controlled gate networks. Rather than trying to reduce the complexity of individual unitary operations, the new strategy is to toggle between all of the unitary operations needed…
Robust gate sequences are widely used to reduce the sensitivity of gate operations to experimental imperfections. Typically, the optimization minimizes the average gate error, however, recent work in quantum error correction has…
Quantum computers require high fidelity quantum gates. These gates are obtained by routine calibration tasks that eat into the availability of cloud-based devices. Restless circuit execution speeds-up characterization and calibration by…
The most general structure (in matrix form) of a single-qubit gate is presented. Subsequently, used that to obtain a set of conditions for testing (a) whether a given 2-qubit gate is genuinely a 2-qubit gate, i.e., not decomposable into two…
The paper discusses various applications of permutation group theory in the synthesis of reversible logic circuits consisting of Toffoli gates with negative control lines. An asymptotically optimal synthesis algorithm for circuits…
Edible robotics is an emerging research field with potential use in environmental, food, and medical scenarios. In this context, the design of edible control circuits could increase the behavioral complexity of edible robots and reduce…
The ambition constrained validity and the model witness problems in the logic UCL, for reasoning about circuits with unreliable gates, are analyzed. Moreover, two additional problems, motivated by the applications, are studied. One consists…
Quantum computing will change the way we tackle certain problems. It promises to dramatically speed-up many chemical, financial, and machine-learning applications. However, to capitalize on those promises, complex design flows composed of…
A novel perspective on the design of robust model predictive control (MPC) methods is presented, whereby closed-loop constraint satisfaction is ensured using recursive feasibility of the MPC optimization. Necessary and sufficient conditions…
We perform formal verification of quantum circuits by integrating several techniques specialized to particular classes of circuits. Our verification methodology is based on the new notion of a reversible miter that allows one to leverage…
We propose an approach to optimally synthesize quantum circuits from non-permutative quantum gates such as Controlled-Square-Root-of-Not (i.e. Controlled-V). Our approach reduces the synthesis problem to multiple-valued optimization and…
Reversible computing can reduce the energy dissipation of computation, which can improve cost-efficiency in some contexts. But the practical applicability of this method depends sensitively on the space and time overhead required by…
Boolean matching is an important problem in logic synthesis and verification. Despite being well-studied for conventional Boolean circuits, its treatment for reversible logic circuits remains largely, if not completely, missing. This work…
Management of communication by on-line routing in new FPGAs with a large amount of logic resources and partial reconfigurability is a new challenging problem. A Network-on-Chip (NoC) typically uses packet routing mechanism, which has often…