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The performance of multiprocessor synchronization and locking protocols is a key factor to utilize the computation power of multiprocessor systems under real-time constraints. While multiple protocols have been developed in the past…

Operating Systems · Computer Science 2020-07-17 Jian-Jia Chen , Junjie Shi , Georg von der Brüggen , Niklas Ueter

In collaborative robotic applications, human and robot have to work together during a whole shift for executing a sequence of jobs. The performance of the human robot team can be enhanced by scheduling the right tasks to the human and the…

Robotics · Computer Science 2025-07-04 Andrea Pupa , Wietse Van Dijk , Cristian Secchi

A common paradigm for scientific computing is distributed message-passing systems, and a common approach to these systems is to implement them across clusters of high-performance workstations. As multi-core architectures become increasingly…

Distributed, Parallel, and Cluster Computing · Computer Science 2012-05-01 Christine Task , Arun Chauhan

We propose three novel mathematical optimization formulations that solve the same two-type heterogeneous multiprocessor scheduling problem for a real-time taskset with hard constraints. Our formulations are based on a global scheduling…

Distributed, Parallel, and Cluster Computing · Computer Science 2017-10-13 Mason Thammawichai , Eric C. Kerrigan

Several novel industrial applications involve human control of vehicles, cranes, or mobile robots through various high-throughput feedback systems, such as Virtual Reality (VR) and tactile/haptic signals. The near real-time interaction…

Networking and Internet Architecture · Computer Science 2022-08-26 Andrea Bedin , Federico Chiariotti , Andrea Zanella

In Real-time system, utilization based schedulability test is a common approach to determine whether or not tasks can be admitted without violating deadline requirements. The exact problem has previously been proven intractable even upon…

Software Engineering · Computer Science 2011-01-11 Jagbeer Singh

The increasing number of threads inside the cores of a multicore processor, and competitive access to the shared cache memory, become the main reasons for an increased number of competitive cache misses and performance decline. Inevitably,…

Hardware Architecture · Computer Science 2017-01-09 Milcho Prisagjanec , Pece Mitrevski

Modular quantum computing provides a scalable approach to overcome the limitations of monolithic quantum architectures by interconnecting multiple Quantum Processing Units (QPUs) through a quantum network. In this work, we explore and…

Quantum Physics · Physics 2025-04-30 Shahrooz Pouryousef , Reza Nejabati , Don Towsley , Ramana Kompella , Eneet Kaur

We propose an asynchronous iterative scheme that allows a set of interconnected nodes to distributively reach an agreement within a pre-specified bound in a finite number of steps. While this scheme could be adopted in a wide variety of…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-01-13 Andreas Grammenos , Themistoklis Charalambous , Evangelia Kalyvianaki

Traditional on-die, three-level cache hierarchy design is very commonly used but is also prone to latency, especially at the Level 2 (L2) cache. We discuss three distinct ways of improving this design in order to have better performance.…

Hardware Architecture · Computer Science 2021-01-26 Pranjal Singh Rajput , Sonnya Dellarosa , Kanya Satis

We study general techniques for implementing distributed data structures on top of future many-core architectures with non cache-coherent or partially cache-coherent memory. With the goal of contributing towards what might become, in the…

Distributed, Parallel, and Cluster Computing · Computer Science 2024-04-09 Panagiota Fatourou , Nikolaos D. Kallimanis , Eleni Kanellou , Odysseas Makridakis , Christi Symeonidou

To mitigate the performance gap between CPU and the main memory, multi-level cache architectures are widely used in modern processors. Therefore, modeling the behaviors of the downstream caches becomes a critical part of the processor…

Hardware Architecture · Computer Science 2020-10-13 Ming Ling , Jiancong Ge , Guangmin Wang

Resource provisioning plays a pivotal role in determining the right amount of infrastructure resource to run applications and target the global decarbonization goal. A significant portion of production clusters is now dedicated to…

Distributed, Parallel, and Cluster Computing · Computer Science 2022-08-29 Clement Mommessin , Renyu Yang , Natalia V. Shakhlevich , Xiaoyang Sun , Satish Kumar , Junqing Xiao , Jie Xu

With the advent of increasingly complex hardware in real-time embedded systems (processors with performance enhancing features such as pipelines, cache hierarchy, multiple cores), many processors now have a set-associative L2 cache. Thus,…

Performance · Computer Science 2009-04-20 Damien Hardy , Isabelle Puaut

We present the use of a hybrid static/dynamic scheduling strategy of the task dependency graph for direct methods used in dense numerical linear algebra. This strategy provides a balance of data locality, load balance, and low dequeue…

Distributed, Parallel, and Cluster Computing · Computer Science 2011-10-13 Simplice Donfack , Laura Grigori , William D. Gropp , Vivek Kale

New algorithms and optimization techniques are needed to balance the accelerating trend towards bandwidth-starved multicore chips. It is well known that the performance of stencil codes can be improved by temporal blocking, lessening the…

Performance · Computer Science 2012-03-01 Markus Wittmann , Georg Hager , Gerhard Wellein

Task-based runtime systems provide flexible load balancing and portability for parallel scientific applications, but their strong scaling is highly sensitive to task granularity. As parallelism increases, scheduling overhead may transition…

Distributed, Parallel, and Cluster Computing · Computer Science 2026-02-26 Sana Taghipour Anvari , David Kaeli

Emerging reconfigurable datacenters allow to dynamically adjust the network topology in a demand-aware manner. These datacenters rely on optical switches which can be reconfigured to provide direct connectivity between racks, in the form of…

Networking and Internet Architecture · Computer Science 2025-03-19 Kathrin Hanauer , Monika Henzinger , Lara Ost , Stefan Schmid

The emergence of Big Data in recent years has resulted in a growing need for efficient data processing solutions. While infrastructures with sufficient compute power are available, the I/O bottleneck remains. The Linux page cache is an…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-01-06 Hoang-Dung Do , Valerie Hayot-Sasson , Rafael Ferreira da Silva , Christopher Steele , Henri Casanova , Tristan Glatard

We consider the problem of scheduling multiprocessor jobs to minimize the total completion time under the given energy budget. Each multiprocessor job requires more than one processor at the same moment of time. Processors may operate at…

Optimization and Control · Mathematics 2021-07-22 Alexander Kononov , Yulia Kovalenko