English
Related papers

Related papers: Production and Characterisation of SLID Interconne…

200 papers

The ATLAS Forward Physics (AFP) project plans to install 3D silicon pixel detectors about 210 m away from the interaction point and very close to the beamline (2-3 mm). This implies the need of slim edges of about 100-200 $\mu$m width for…

Instrumentation and Detectors · Physics 2015-11-09 Jörn Lange , Emanuele Cavallaro , Sebastian Grinstein , Ivan Lopez Paz

Results of beam tests with planar silicon pixel sensors aimed towards the ATLAS Insertable B-Layer and High Luminosity LHC (HL-LHC) upgrades are presented. Measurements include spatial resolution, charge collection performance and charge…

The ATLAS Insertable B-Layer (IBL) collaboration plans to insert a fourth pixel layer inside the present Pixel Detector to recover from eventual failures in the current pixel system, especially the b-layer. Additionally the IBL will ensure…

Instrumentation and Detectors · Physics 2012-02-17 Malte Backhaus

The ATLAS experiment will undergo a major upgrade of the tracker system in view of the high luminosity phase of the LHC (HL-LHC) to start operation in 2026. The most severe challenges are to be faced by the innermost layers of the pixel…

Instrumentation and Detectors · Physics 2016-12-06 Julien-Christopher Beyer , Alessandro La Rosa , Anna Macchiolo , Richard Nisius , Natascha Savic

We present the results of the characterization of novel n-in-p planar pixel detectors, designed for the future upgrades of the ATLAS pixel system. N-in-p silicon devices are a promising candidate to replace the n-in-n sensors thanks to…

Instrumentation and Detectors · Physics 2012-03-01 A. Macchiolo , C. Gallrapp , A. La Rosa , R. Nisius , H. Pernegger , R. H. Richter , P. Weigell

A reliable and cost-effective interconnect technology is required for the development of hybrid pixel detectors. The interconnect technology needs to be adapted for the pitch and die sizes of the respective applications. For small-scale…

The innermost part of the tracking detector of the ATLAS experiment consists mainly of planar n$^+$-in-n silicon pixel sensors. During the phase-0 upgrade, the Insertable B-Layer (IBL) was installed closest to the beam pipe. Its pixels are…

Instrumentation and Detectors · Physics 2018-08-21 A. Gisen , S. Altenheiner , C. Gößling , M. Grothe , R. Klingenberg , K. Kröninger , J. Lönker , M. Weers , T. Wittig , F. Wizemann

This study constructs a hybrid module with a multi-material collaborative detection architecture by integrating silicon pixel layers into the longitudinally segmented scintillating fiber sampling calorimeter module and optimizes the…

Instrumentation and Detectors · Physics 2025-09-30 Jia-Le Fei , Ao Yuan , Chang-Heng Huang , Liu-Pan An , Ji-Ke Wang

Hybrid pixel detectors require a reliable and cost-effective interconnect technology adapted to the pitch and die sizes of the respective applications. During the ASIC and sensor R\&D phase, especially for small-scale applications, such…

To cope with the harsh environment foreseen at the high luminosity conditions of HL- LHC, the ATLAS pixel detector has to be upgraded to be fully efficient with a good granularity, a maximized geometrical acceptance and an high read out…

To cope with the higher occupancy and radiation damage at the HL-LHC also the LHC experiments will be upgraded. The ATLAS Planar Pixel Sensor R&D Project (PPS) is an international collaboration of 17 institutions and more than 80…

Instrumentation and Detectors · Physics 2019-08-14 Philipp Weigell

Deep sub micron HV-CMOS processes offer the opportunity for sensors built by industry standard techniques while being HV tolerant, making them good candidates for drift-based, fast collecting, thus radiation-hard pixel detectors. For the…

Instrumentation and Detectors · Physics 2016-09-21 Branislav Ristic

Visible-spectrum photonic integrated circuits (PICs) present compact and scalable solutions for emerging technologies including quantum computing, biosensing, and virtual/augmented reality. Realizing their full potential requires the…

In view of the LHC upgrade phases towards the High Luminosity LHC (HL-LHC), the ATLAS experiment plans to upgrade the Inner Detector with an all-silicon system. The n-on-p silicon technology is a promising candidate to achieve a large area…

In view of the High Luminosity upgrade of the Large Hadron Collider (HL-LHC), planned to start around 2023-2025, the ATLAS experiment will undergo a replacement of the Inner Detector. A higher luminosity will imply higher irradiation levels…

Instrumentation and Detectors · Physics 2016-12-21 N. Savic , J. Beyer , A. La Rosa , A. Macchiolo , R. Nisius

In view of the LHC upgrade phases towards the High Luminosity LHC (HL-LHC), the ATLAS experiment plans to upgrade the Inner Detector with an all-silicon system. Because of its radiation hardness and cost effectiveness, the n-on-p silicon…

Instrumentation and Detectors · Physics 2013-11-18 M. Bomben , A. Bagolini , M. Boscardin , L. Bosisio , G. Calderini , J. Chauveau , G. Giacomini , A. La Rosa , G. Marchori , N. Zorzi

Following the Phase-II upgrade during Long Shutdown (LS3), the LHC aims to reach a peak instantaneous luminosity of $7.5\times 10^{34}$cm$^{-2}$s$^{-1}$, which corresponds to an average of around 200 inelastic proton-proton collisions per…

Planar silicon pixel sensors with modified n$^+$-implantation shapes based on the IBL pixel sensor were designed in Dortmund. The sensors with a pixel size of $250\,\mu$m $\times$ $50\,\mu$m are produced in n$^+$-in-n sensor technology. The…

Instrumentation and Detectors · Physics 2020-01-29 M. Wagner , A. Gisen , M. Hötting , V. Hohm , C. Krause , K. Kröninger , A. Kroner , J. Lönker , M. Muschak , J. Weingarten , F. Wizemann

The High Luminosity LHC (HL-LHC) upgrade requires the planned Inner Tracker (ITk) of the ATLAS detector to tolerate extremely high radiation doses. Specifically, the innermost parts of the pixel system will have to withstand radiation…

3D-Integration is a promising technology towards higher interconnect densities and shorter wiring lengths between multiple chip stacks, thus achieving a very high performance level combined with low power consumption. This technology also…

Other Computer Science · Computer Science 2008-12-18 Jürgen Wolf , P. Ramm , Armin Klumpp , H. Reichl