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The gap between the cost of moving data and the cost of computing continues to grow, making it ever harder to design iterative solvers on extreme-scale architectures. This problem can be alleviated by alternative algorithms that reduce the…

Recently, Graphcore has introduced an IPU Processor for accelerating machine learning applications. The architecture of the processor has been designed to achieve state of the art performance on current machine intelligence models for both…

Computer Vision and Pattern Recognition · Computer Science 2020-03-02 Ilyes Kacher , Maxime Portaz , Hicham Randrianarivo , Sylvain Peyronnet

Power density constraints are limiting the performance improvements of modern CPUs. To address this we have seen the introduction of lower-power, multi-core processors, but the future will be even more exciting. In order to stay within the…

Instrumentation and Detectors · Physics 2016-01-20 Giuseppe Cerati , Peter Elmer , Steven Lantz , Kevin McDermott , Dan Riley , Matevž Tadel , Peter Wittich , Frank Würthwein , Avi Yagil

The runtime of a Lattice QCD simulation is dominated by a small kernel, which calculates the product of a vector by a sparse matrix known as the "Dslash" operator. Therefore, this kernel is frequently optimized for various HPC…

Distributed, Parallel, and Cluster Computing · Computer Science 2014-09-05 O. Kaczmarek , C. Schmidt , P. Steinbrecher , Swagato Mukherjee , M. Wagner

We present our experience with the modernization on the GR-MHD code BHAC, aimed at improving its novel hybrid (MPI+OpenMP) parallelization scheme. In doing so, we showcase the use of performance profiling tools usable on x86 (Intel-based)…

Distributed, Parallel, and Cluster Computing · Computer Science 2021-08-30 Salvatore Cielo , Oliver Porth , Luigi Iapichino , Anupam Karmakar , Hector Olivares , Chun Xia

A chiplet is an integrated circuit that encompasses a well-defined subset of an overall system's functionality. In contrast to traditional monolithic system-on-chips (SoCs), chiplet-based architecture can reduce costs and increase…

Hardware Architecture · Computer Science 2023-12-12 Shixin Chen , Shanyi Li , Zhen Zhuang , Su Zheng , Zheng Liang , Tsung-Yi Ho , Bei Yu , Alberto L. Sangiovanni-Vincentelli

Machine intelligence, especially using convolutional neural networks (CNNs), has become a large area of research over the past years. Increasingly sophisticated hardware accelerators are proposed that exploit e.g. the sparsity in…

Distributed, Parallel, and Cluster Computing · Computer Science 2020-06-23 Andreas Bytyn , René Ahlsdorf , Rainer Leupers , Gerd Ascheid

Frequent itemset mining leads to the discovery of associations and correlations among items in large transactional databases. Apriori is a classical frequent itemset mining algorithm, which employs iterative passes over database combining…

Distributed, Parallel, and Cluster Computing · Computer Science 2023-03-09 Mikhail Zymbler

Recent research on vision backbone architectures has predominantly focused on optimizing efficiency for hardware platforms with high parallel processing capabilities. This category increasingly includes embedded systems such as mobile…

Computer Vision and Pattern Recognition · Computer Science 2026-03-31 Moritz Nottebaum , Matteo Dunnhofer , Christian Micheloni

This paper describes AutoFocus, an efficient multi-scale inference algorithm for deep-learning based object detectors. Instead of processing an entire image pyramid, AutoFocus adopts a coarse to fine approach and only processes regions…

Computer Vision and Pattern Recognition · Computer Science 2019-08-02 Mahyar Najibi , Bharat Singh , Larry S. Davis

Hardware/Software (HW/SW) co-designed processors provide a promising solution to the power and complexity problems of the modern microprocessors by keeping their hardware simple. Moreover, they employ several runtime optimizations to…

Hardware Architecture · Computer Science 2021-03-01 Rakesh Kumar , Alejandro Martinez , Antonio Gonzalez

The popularity of Convolutional Neural Network (CNN) models and the ubiquity of CPUs imply that better performance of CNN model inference on CPUs can deliver significant gain to a large number of users. To improve the performance of CNN…

Distributed, Parallel, and Cluster Computing · Computer Science 2019-07-09 Yizhi Liu , Yao Wang , Ruofei Yu , Mu Li , Vin Sharma , Yida Wang

In this work, we consider the integration of MPI one-sided communication and non-blocking I/O in HPC-centric MapReduce frameworks. Using a decoupled strategy, we aim to overlap the Map and Reduce phases of the algorithm by allowing…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-10-10 Sergio Rivas-Gomez , Sai Narasimhamurthy , Keeran Brabazon , Oliver Perks , Erwin Laure , Stefano Markidis

The rapid adaptation of data driven AI models, such as deep learning inference, training, Vision Transformers (ViTs), and other HPC applications, drives a strong need for runtime precision configurable different non linear activation…

Hardware Architecture · Computer Science 2026-02-12 Mukul Lokhande , Gopal Raut , Santosh Kumar Vishvakarma

GPUs have been favored for training deep learning models due to their highly parallelized architecture. As a result, most studies on training optimization focus on GPUs. There is often a trade-off, however, between cost and efficiency when…

In this work, we propose FFDP, a set of IO-aware non-GEMM fused kernels supplemented with a distributed framework for image registration at unprecedented scales. Image registration is an inverse problem fundamental to biomedical and life…

Computer Vision and Pattern Recognition · Computer Science 2025-09-30 Rohit Jena , Vedant Zope , Pratik Chaudhari , James C. Gee

We introduce a lightweight and accurate architecture for resource-efficient visual correspondence. Our method, dubbed XFeat (Accelerated Features), revisits fundamental design choices in convolutional neural networks for detecting,…

Computer Vision and Pattern Recognition · Computer Science 2024-05-01 Guilherme Potje , Felipe Cadar , Andre Araujo , Renato Martins , Erickson R. Nascimento

Region proposal is critical for object detection while it usually poses a bottleneck in improving the computation efficiency on traditional control-flow architectures. We have observed region proposal tasks are potentially suitable for…

Distributed, Parallel, and Cluster Computing · Computer Science 2018-10-30 Wenzhi Fu , Jianlei Yang , Pengcheng Dai , Yiran Chen , Weisheng Zhao

With mobile networks expected to support services with stringent requirements that ensure high-quality user experience, the ability to apply Feed-Forward Neural Network (FFNN) models to User Equipment (UE) use cases has become critical.…

Networking and Internet Architecture · Computer Science 2025-09-09 Andrea Tassi , Oluwatayo Yetunde Kolawole , Joan Pujol Roig , Daniel Warren

Designing fast and scalable algorithm for mining frequent itemsets is always being a most eminent and promising problem of data mining. Apriori is one of the most broadly used and popular algorithm of frequent itemset mining. Designing…

Databases · Computer Science 2017-01-24 Sudhakar Singh , Rakhi Garg , P. K. Mishra