Related papers: CMOS Low Power Cell Library For Digital Design
Neuromorphic systems that densely integrate CMOS spiking neurons and nano-scale memristor synapses open a new avenue of brain-inspired computing. Existing silicon neurons have molded neural biophysical dynamics but are incompatible with…
Large-scale battery energy storage systems (BESS) are helping transition the world towards sustainability with their broad use, among others, in electrified transportation, power grid, and renewables. However, optimal power management for…
Reversible logic has received great attention in the recent years due to their ability to reduce the power dissipation which is the main requirement in low power digital design. It has wide applications advanced computing, low power CMOS…
Excessive switching activity is a primary contributor to dynamic power dissipation in modern FPGAs, where fine-grained configurability amplifies signal toggling and associated capacitance. Conventional low-power techniques -- gating,…
Sensor nodes and IoT systems require blocks that not only consume low power but also have good accuracy. Voltage reference generators are also considered important building blocks in sensor interface circuits. This paper presents a solution…
To assess the viability of a shallow-depth neutrino detector, a Cosmic Muon Veto Detector (CMVD) is being constructed on top of the stack of Resistive Plate Chamber (RPC) detectors at TIFR, Mumbai. The CMVD employs extruded plastic…
The prevalent high intrinsic absorption in the crystalline state of phase-change materials (PCMs), typically leads to a decline in modulation efficiency for phase-change metasurfaces, underutilizing their potential for quasi-continuous…
As the CMOS technology enters nanometer scales, integrated circuits (ICs) become increasingly sensitive to radiation-induced soft errors, which can corrupt the state of storage elements and cause severe reliability issues. Many hardened…
As ASIC supply voltages approach one volt, the source-impedance goals for power distribution networks are driven ever lower as well. One approach to achieving these goals is to add decoupling capacitors of various values until the desired…
Under certain conditions, applying a sequence of voltage pulses of alternating polarities across a resistive switching memory device induces a finite number of fixed-point attractors in its time-averaged dynamics, known as dynamical…
This manuscript reports a semiconductor-sensitized thermal cell (STC) that converts ambient heat into electrical power while simultaneously reducing its own temperature under isothermal conditions. Using a printable…
In the past few years, advancements in the field of nano circuit design has become tougher than the demand. Low power devices have emerged tremendously.Both voltage mode aswell as current mode devices have proven alternative to each other…
The lack of an easily realizable complementary circuit technology offering low static power consumption has been limiting the utilization of other semiconductor materials than silicon. In this publication, a novel depletion mode JFET based…
High linear voltage references circuitry are designed and implemented in TSMC 0.18$\mu$m CMOS technology. Previous research has proposed the use of MOS transistors operating in the weak inversion region to replace the bipolar devices in…
Phase change memory (PCM) is one of the leading candidates for neuromorphic hardware and has recently matured as a storage class memory. Yet, energy and power consumption remain key challenges for this technology because part of the PCM…
Energy consumption has become a first-class optimization goal in design and implementation of data-intensive computing systems. This is particularly true in the design of database management systems (DBMS), which was found to be the major…
With the scaling of technology and higher requirements on performance and functionality, power dissipation is becoming one of the major design considerations in the development of network processors. In this paper, we use an assertion-based…
Compute-in-memory (CIM) presents an attractive approach for energy-efficient computing in data-intensive applications. However, the development of suitable memory designs to achieve high-performance CIM remains a challenging task. Here, we…
As minimum area SRAM bit-cells are obtained when using cell ratio and pull-up ratio of 1, we analyze the possibility of decreasing the cell ratio from the conventional values comprised between 1.5-2.5 to 1. The impact of this option on…
Reduction in power consumption has become a major criterion of design in modern ICs. One such scheme to reduce power consumption by an IC is the use of multiple power supplies for critical and non-critical paths. To maintain the impedance…