Related papers: Balanced Modulation for Nonvolatile Memories
Artificial intelligence (AI) provides an alternative way to design channel coding with affordable complexity. However, most existing studies can only learn codes for a given size and rate, typically defined by a fixed network architecture…
Distributed computing frameworks such as MapReduce and Spark are often used to process large-scale data computing jobs. In wireless scenarios, exchanging data among distributed nodes would seriously suffer from the communication bottleneck…
This paper presents a hybrid decoding architecture that serially couples a normalized min-sum (NMS) decoder with reinforced ordered statistics decoding (OSD) to achieve near-maximum likelihood (ML) performance for short linear block codes,…
In the age of data revolution, a modern storage~or transmission system typically requires different levels of protection. For example, the coding technique used to fortify data in a modern storage system when the device is fresh cannot be…
Off-chip buses account for a significant portion of the total system power consumed in embedded systems. Bus encoding schemes have been proposed to minimize power dissipation, but none has been demonstrated to be optimal with respect to any…
With the skyrocketing costs of GPUs and their virtual instances in the cloud, there is a significant desire to use CPUs for large language model (LLM) inference. KV cache update, often implemented as allocation, copying, and in-place…
A non-binary (2,v)-regular LDPC code is defined by a parity-check matrix with column weight 2 and row weight v. In this report, we give an ontology-based approach to the optimization for this class of codes. All possible inter-connected…
Fault tolerance is one of the major design goals for HPC. The emergence of non-volatile memories (NVM) provides a solution to build fault tolerant HPC. Data in NVM-based main memory are not lost when the system crashes because of the…
With the development of quantum hardware bringing the error-corrected quantum circuits to the near future, the lack of an efficient polynomial-time decoding algorithms for logical circuits presents a critical bottleneck. While quantum…
Unlike conventional converters, modular multilevel converter (MMC) has a higher switching frequency -- which has direct implication on important parameters like converter loss and reliability -- mainly due to increased number of switching…
Federated fine-tuning offers a promising approach for tuning Large Language Models (LLMs) on edge devices while preserving data privacy. However, fine-tuning these models on edge devices remains challenging due to high memory,…
New algorithms and optimization techniques are needed to balance the accelerating trend towards bandwidth-starved multicore chips. It is well known that the performance of stencil codes can be improved by temporal blocking, lessening the…
This paper develops a general method for constructing entanglement-assisted quantum low-density parity-check (LDPC) codes, which is based on combinatorial design theory. Explicit constructions are given for entanglement-assisted quantum…
Digital data transfer can be protected by means of suitable error correcting codes. Among the families of state-of-the-art codes, LDPC (Low Density Parity-Check) codes have received a great deal of attention recently, because of their…
Network switches and routers need to serve packet writes and reads at rates that challenge the most advanced memory technologies. As a result, scaling the switching rates is commonly done by parallelizing the packet I/Os using multiple…
Large-scale distributed storage systems typically use erasure codes to provide durability of data in the face of failures. A set of $k$ blocks to be stored is encoded using an $[n, k]$ code to generate $n$ blocks that are then stored on…
Quantum low density parity check (qLDPC) codes, particularly bivariate bicycle (BB) codes, achieve competitive fault tolerance thresholds while offering substantially higher encoding rates than planar surface codes. However, their…
We consider the problem of computing a binary linear transformation using unreliable components when all circuit components are unreliable. Two noise models of unreliable components are considered: probabilistic errors and permanent errors.…
Connecting multiple smaller qubit modules by generating high-fidelity entangled states is a promising path for scaling quantum computing hardware. The performance of such a modular quantum computer is highly dependent on the quality and…
In this work we propose RELDEC, a novel approach for sequential decoding of moderate length low-density parity-check (LDPC) codes. The main idea behind RELDEC is that an optimized decoding policy is subsequently obtained via reinforcement…